Semiconductor die package and methods of formation

A method, comprising:

• forming a first semiconductor die;
• forming a second semiconductor die, bonded with the first semiconductor die at a first side of the second semiconductor die, the second semiconductor die comprising:
• a device region including one or more semiconductor devices;
• and
• an interconnect region between the device region and the first semiconductor die;
• forming a dielectric layer over a second side of the second semiconductor die opposing the first side, wherein the dielectric layer has an intrinsic negative charge polarity;
• and
• forming a conductive via structure that extends through the dielectric layer, through the device region, and into a portion of the interconnect region,
• wherein the conductive via structure is a through silicon via (TSV) structure that extends through a p-well in the device region and not through an n-well in the device region.

A method, comprising:

• forming a first semiconductor die;
• and
• forming a second semiconductor die, bonded with the first semiconductor die at a first side of the second semiconductor die, the second semiconductor die comprising:
• a device region including one or more semiconductor devices;
• and
• an interconnect region between the device region and the first semiconductor die;
• forming a high dielectric constant (high-k) dielectric layer over a second side of the second semiconductor die opposing the first side,
• wherein the high-k dielectric layer has an intrinsic negative charge polarity;
• and
• forming a through silicon via (TSV) structure that extends through the high-k dielectric layer, through the device region, and into a portion of the interconnect region,
• wherein the TSV structure extends through a p-well that is next to an n-well in the device region, and
• wherein the intrinsic negative charge polarity of the high-k dielectric layer is configured to resist current leakage from the p-well to the n-well.