Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsYoungdeuk Kim, Mina Choi
Life of this patent
Estimating the term…
Abstract
Provided is a semiconductor package including a first substrate, a first chip structure on the first substrate, the first chip structure including at least one chip, a heat dissipation member on the first chip structure, the heat dissipation member including a heat dissipation plate including a first surface facing the first chip structure and a second surface opposite to the first surface and a seed metal layer on the second surface of the heat dissipation plate, and a metal thermal interfacial material (TIM) on the seed metal layer.
Claims19
A semiconductor package comprising:
- a first substrate;
- a first chip structure on the first substrate, the first chip structure comprising at least one chip;
- a heat dissipation member on the first chip structure, the heat dissipation member comprising:
- a heat dissipation plate comprising a first surface facing the first chip structure and a second surface opposite to the first surface;
- and
- a seed metal layer on the second surface of the heat dissipation plate;
- a metal thermal interfacial material (TIM) on the seed metal layer;
- and
- a first adhesive layer between the first chip structure and the heat dissipation member.
A semiconductor package comprising:
- a first substrate;
- a first chip structure and a second chip structure in a horizontal direction on the first substrate;
- a heat dissipation member on the first chip structure and the second chip structure, the heat dissipation member comprising:
- a heat dissipation plate that comprises a first surface facing the first chip structure and the second chip structure and a second surface opposite to the first surface;
- and
- a seed metal layer on the second surface of the heat dissipation plate;
- a metal thermal interfacial material (TIM) on the seed metal layer;
- and
- a first adhesive layer between the first surface of the heat dissipation plate and the first chip structure and between the first surface of the heat dissipation plate and the second chip structure.
A semiconductor package comprising:
- a package substrate;
- an interposer substrate on the package substrate;
- a first chip structure on the interposer substrate, the first chip structure comprising at least one chip;
- a second chip structure on the interposer substrate and spaced apart from the first chip structure in a horizontal direction;
- a heat dissipation member on the first chip structure and the second chip structure, the heat dissipation member comprising:
- a heat dissipation plate that comprises a first surface facing the first chip structure and the second chip structure and a second surface opposite to the first surface;
- and
- a seed metal layer on the second surface of the heat dissipation plate;
- a first adhesive layer between the first chip structure and the heat dissipation member;
- and
- a metal thermal interfacial material (TIM) on the seed metal layer,
- wherein one of the first chip structure and the second chip structure comprises a logic chip, and the other of the first chip structure and the second chip structure comprises a high bandwidth memory (HBM) package comprising a plurality of memory chips in a vertical direction, and
- wherein the seed metal layer comprises seed metal for forming the metal TIM.
Dependencies are inferred from the claim text.