Dual damascene fully-aligned via interconnects with dual etch layers

An interconnect structure comprising:

• an electrically conductive line structure embedded in a first interconnect dielectric material layer;
• a combined via/line electrically conductive structure embedded in a second interconnect dielectric material layer that is located above the first interconnect dielectric material layer, wherein the combined via/line electrically conductive structure includes a lower via portion and an upper line portion, wherein the lower via portion of the combined via/line electrically conductive structure is fully-aligned to the electrically conductive line structure embedded in the first interconnect dielectric material layer;
• and
• a dual etch stop layer structure located between the first interconnect dielectric material layer and the second interconnect dielectric material layer and comprising a first etch stop layer and a second etch stop layer, wherein both the first etch stop layer and the second etch stop layer are located beneath the upper line portion of the combined via/line electrically conductive structure and disposed adjacent to a sidewall of the lower via portion in a region between a top portion and a bottom portion of the lower via portion of the combined electrically conductive structure, the first etch stop layer forms an interface with a topmost surface of the first interconnect dielectric material layer, and the second etch stop layer partially, but not entirely, covers a topmost surface of the first etch stop layer.