Gas phase treatment for manufacturing semiconductor structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYao-Sheng Huang, Hsiang-Pi Chang, Shen-Yang Lee, Huang-Lin Chao
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Abstract
A method for manufacturing a semiconductor structure includes trimming a semiconductor region using a gaseous halogen-based etchant such that the trimmed semiconductor region has a first part and a second part which is formed on the first part and which has a halogen-terminated trimmed surface, and treating the halogen-terminated trimmed surface of the second part using a gaseous oxidant including hydrogen and oxygen such that the second part is oxidized to form an oxidized part, and such that the halogen-terminated trimmed surface is converted into a hydroxyl group-terminated surface of the oxidized part.
Claims20
A method for manufacturing a semiconductor structure which includes a transistor, comprising:
- forming a patterned structure which includes
- a substrate having an upper surface and a planar lower surface opposite to the upper surface,
- a lower source/drain portion of the transistor disposed on the substrate,
- a semiconductor region disposed on the lower source/drain portion, and
- an upper source/drain portion of the transistor disposed on the semiconductor region, such that the semiconductor region extends lengthwise between the lower source/drain portion and the upper source/drain portion along a direction normal to the planar lower surface of the substrate;
- after forming the patterned structure, trimming the semiconductor region using a gaseous halogen-based etchant such that the trimmed semiconductor region has a first part which serves as a channel of the transistor, and a second part which is formed on the first part and which has a halogen-terminated trimmed surface, the channel extending lengthwise between the lower source/drain portion and the upper source/drain portion along the direction normal to the planar lower surface of the substrate;
- and
- treating the halogen-terminated trimmed surface of the second part using a gaseous oxidant including hydrogen and oxygen such that the second part is oxidized to form an oxidized part, and such that the halogen-terminated trimmed surface is converted into a hydroxyl group-terminated surface of the oxidized part.
A method for manufacturing a semiconductor structure, comprising:
- forming a semiconductor portion over a substrate, the semiconductor portion extending lengthwise along a direction normal to the substrate and having a lower surface proximate to the substrate, an upper surface distal from the substrate, and an outer peripheral surface interconnecting the lower surface and the upper surface;
- trimming a region of the semiconductor portion inward from the outer peripheral surface with a gaseous halogen-based etchant such that the trimmed region has an inner part and an outer part which surrounds the inner part, and which has an trimmed surface with halogen termination;
- treating the trimmed surface of the outer part with a gaseous oxidant including hydrogen and oxygen such that the outer part is oxidized to form an oxidized part, and such that the trimmed surface with halogen termination is converted into a treated surface of the oxidized part with hydroxyl group termination;
- and
- forming a dielectric portion on the oxidized part opposite to the inner part, the dielectric portion including metal elements.
A method for manufacturing a semiconductor structure, comprising:
- forming a patterned structure which includes
- a substrate having an upper surface and a planar lower surface opposite to the upper surface,
- a semiconductor portion formed over the upper surface of the substrate, the semiconductor portion including a lower region proximate to the substrate, an upper region distal from the substrate, and a middle region disposed between the lower region and the upper region, and
- a lower gate spacer and an upper gate spacer respectively formed around the lower region and the upper region such that the middle region is exposed from the lower gate spacer and the upper gate spacer, a width of the middle region being greater than a width of each of the upper region and the lower region when measured along a direction parallel to the planar lower surface of the substrate;
- trimming the middle region using a gaseous halogen-based etchant such that the trimmed middle region has an inner part and an outer part which surrounds the inner part, and which has a halogen-terminated trimmed surface;
- treating the halogen-terminated trimmed surface of the outer part using a gaseous oxidant including hydrogen and oxygen such that the outer part is oxidized to form an interfacial layer disposed around the inner part, and such that the halogen-terminated trimmed surface is converted into a hydroxyl group-terminated treated surface of the interfacial layer;
- and
- forming a gate dielectric layer on the interfacial layer.
Dependencies are inferred from the claim text.