Image sensor

An image sensor, comprising:

• a substrate having a first surface and a second surface, the first surface and the second surface being opposite to each other;
• micro lenses on the second surface;
• interconnection lines on the first surface;
• and
• a pixel isolation portion in the substrate, the pixel isolation portion configured to isolate pixels from direct contact with each other,
• wherein the pixel isolation portion includes an insulating isolation pattern and a conductive pattern, the conductive pattern being spaced apart from the substrate, and the insulating isolation pattern being between the substrate and the conductive pattern,
• wherein the conductive pattern comprises a sequential arrangement of an outer semiconductive pattern and an inner semiconductive pattern on a side surface of the insulating isolation pattern,
• wherein the outer semiconductive pattern includes a polycrystalline semiconductor layer containing impurities of a first conductivity type,
• wherein the inner semiconductive pattern includes a substantially intrinsic polycrystalline semiconductor layer, and
• wherein a grain size of the inner semiconductive pattern is larger than a grain size of the outer semiconductive pattern.

An image sensor, comprising:

• a substrate having a first surface and a second surface, the first surface and the second surface being opposite to each other, and the substrate including a clockwise arrangement of first to fourth pixels;
• a backside insulating layer in contact with the second surface;
• a transfer gate on the first surface of the substrate, in each of the first to fourth pixels;
• micro lenses on the second surface;
• an interlayer insulating layer covering the first surface of the substrate;
• interconnection lines in the interlayer insulating layer;
• and
• a pixel isolation portion in the substrate and between the first to fourth pixels, the pixel isolation portion configured to isolate the first to fourth pixels from direct contact with each other,
• wherein the pixel isolation portion includes an insulating isolation pattern and a conductive pattern, the conductive pattern being spaced apart from the substrate, and the insulating isolation pattern being between the substrate and the conductive pattern,
• wherein the conductive pattern includes a sequential arrangement of a first semiconductive pattern, a second semiconductive pattern, and a third semiconductive pattern on a side surface of the insulating isolation pattern, and
• wherein a grain size of the second semiconductive pattern is larger than a grain size of the third semiconductive pattern.