Method of manufacturing a semiconductor device with multi-layer gate spacers
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWen-Kai Lin, Che-Hao Chang, Chi On Chui, Yung-Cheng Lu
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Abstract
Semiconductor devices and methods of manufacture are presented in which spacers are manufactured on sidewalls of gates for semiconductor devices. In embodiments the spacers comprise a first seal, a second seal, and a contact etch stop layer, in which the first seal comprises a first shell along with a first bulk material, the second seal comprises a second shell along with a second bulk material, and the contact etch stop layer comprises a third bulk material and a second dielectric material.
Claims20
A method of manufacturing a semiconductor device, the method comprising:
- forming a first spacer layer comprising an inner layer disposed between two outer layers, wherein the inner layer and the two outer layers each comprise a first material, wherein a carbon content of the two outer layers is greater than that of the inner layer, and an oxygen content of the two outer layers is less than that of the inner layer;
- and
- forming a second spacer layer comprising a first layer and a second layer, the first layer being the first material and being in direct contact with one of the two outer layers.
A method of manufacturing a semiconductor device, the method comprising:
- depositing a first shell of a first material with a first composition;
- depositing a first bulk material of the first material with a second composition different from the first composition;
- depositing a second bulk material of the first material with a third composition;
- depositing a second shell of the first material with a fourth composition different from the third composition;
- depositing a third bulk material of the first material with a fifth composition;
- and
- depositing a third shell of a second material different from the first material.
A method of manufacturing a semiconductor device, the method comprising:
- patterning a dummy gate electrode over a semiconductor fin;
- sequentially introducing a first set of precursors to the dummy gate electrode using a first set of exposure times to form a first shell layer;
- sequentially introducing the first set of precursors to the dummy gate electrode using a second set of exposure times different from the first set of exposure times to form a first bulk dielectric material;
- sequentially introducing the first set of precursors to the dummy gate electrode using a third set of exposure times to form a second bulk dielectric material;
- sequentially introducing the first set of precursors to the dummy gate electrode using a fourth set of exposure times to form a second shell layer;
- sequentially introducing the first set of precursors to the dummy gate electrode using a fifth set of exposure times to form a third bulk dielectric material;
- and
- depositing a dielectric material after the sequentially introducing the first set of precursors to the dummy gate electrode using the fifth set of exposure times.
Dependencies are inferred from the claim text.