Cap for gate stack of multigate device

A method comprising:

• forming an interfacial layer over a channel layer;
• forming a high-k dielectric layer over the interfacial layer;
• forming a work function layer over the high-k dielectric layer;
• forming a cap over the work function layer, wherein the forming the cap includes:
• forming a first metal nitride layer over the work function layer,
• after breaking vacuum, forming a second metal nitride layer over the first metal nitride layer, and
• forming a silicon-comprising layer over the second metal nitride layer;
• and
• forming at least one electrically conductive layer over the cap, wherein the at least one electrically conductive layer includes a third metal nitride layer.

A method comprising:

• depositing a high-k dielectric layer in a gate opening, wherein the high-k dielectric layer is deposited around a first semiconductor layer and a second semiconductor layer exposed by the gate opening, and further wherein the high-k dielectric layer is deposited in a gap between the first semiconductor layer and the second semiconductor layer;
• depositing a titanium aluminum carbide layer in the gate opening and the gap, wherein the titanium aluminum carbide layer is deposited on the high-k dielectric layer;
• depositing a first metal nitride layer in the gate opening and the gap, wherein the first metal nitride layer is deposited on the titanium aluminum carbide layer;
• after exposing the first metal nitride layer to an oxygen ambient, depositing a second metal nitride layer in the gate opening and on the first metal nitride layer;
• depositing a silicon layer in the gate opening and on the second metal nitride layer;
• and
• depositing third metal nitride metal layer in the gate opening and on the silicon layer.