Metal-oxide semiconductor field-effect transistor having enhanced high-frequency performance and methods for fabricating same

A method for fabricating a laterally-diffused metal-oxide semiconductor (LDMOS) device having enhanced high-frequency performance, the method comprising:

• forming a semiconductor substrate of a first conductivity type;
• forming a doped drift region of a second conductivity type on at least a portion of the substrate, the second conductivity type being opposite in polarity to the first conductivity type;
• forming a body region of the first conductivity type in the doped drift region proximate an upper surface of the doped drift region;
• forming source and drain regions of the second conductivity type proximate an upper surface of the body region and doped drift region, respectively, and spaced apart laterally from one another;
• forming a first insulating layer on at least a portion of an upper surface of the body region and an upper surface of the doped drift region;
• and
• forming a gate structure comprising a plurality of gate segments on an upper surface of the first insulating layer, each of the gate segments being spaced laterally from one another by a second insulating layer disposed between adjacent gate segments, wherein a spacing between adjacent ones of the gate segments is between about 2 nanometers (nm) to about 50 nm and is controlled as a function of a thickness of the second insulating layer, and
• wherein thicknesses of the first and second insulating layers are independently controlled.

A laterally-diffused metal-oxide semiconductor (LDMOS) device having enhanced high-frequency performance, comprising:

• a semiconductor substrate of a first conductivity type;
• a doped drift region of a second conductivity type formed on at least a portion of the substrate, the second conductivity type being opposite in polarity to the first conductivity type;
• a body region of the first conductivity type formed in the doped drift region proximate an upper surface of the doped drift region;
• source and drain regions of the second conductivity type formed proximate an upper surface of the body region and doped drift region, respectively, and spaced apart laterally from one another;
• a first insulating layer formed on at least a portion of an upper surface of the body region and an upper surface of the doped drift region;
• and
• a gate structure comprising a plurality of gate segments formed on an upper surface of the first insulating layer, each of the gate segments being spaced laterally from one another by a second insulating layer disposed between adjacent gate segments,
• wherein upper surfaces of a first one of the gate segments, a second one of the gate segments, and a third one of the gate segments are coplanar,
• wherein the first one of the gate segments vertically overlaps at least a portion of the body region,
• wherein a portion of the second insulating layer that is between the first one of the gate segments and the second one of the gate segments is directly on the upper surface of the first insulating layer, and
• wherein the portion of the second insulating layer comprises at least one of:
• (i) a thickness that is different from a thickness of the first insulating layer, or (ii) a material that is different from a material of the first insulating layer.