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US 12,733,193 B2Granted
Semiconductor structure comprising first III-V compound layerand second III-V compound layer and method of manufacture
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorEn-Shuo Lin
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Abstract
A semiconductor structure includes a substrate including a p-type region and an n-type region, wherein the n-type region is in the p-type region and a distance between a top surface of the substrate and the n-type region is less than a distance between the top surface of the substrate and the p-type region. A buffer layer is over the n-type region and a first III-V compound layer is over the buffer layer. A second III-V compound layer is over the first III-V compound layer and a metal structure is over the second III-V compound layer. The metal structure may include a coplanar waveguide or a high electron mobility transistor.
Claims20
A semiconductor structure, comprising:
- a substrate including a p-type region and an n-type region, wherein:
- the n-type region is in the p-type region,
- a distance between a top surface of the substrate and the n-type region is less than a distance between the top surface of the substrate and the p-type region,
- a maximum dopant concentration of the n-type region is closer to the top surface of the substrate than a bottom surface of the n-type region interfacing with the p-type region,
- the maximum dopant concentration is below a top surface of the n-type region,
- the n-type region comprises:
- a first n-type portion having a first n-type dopant concentration;
- a second n-type portion having a second n-type dopant concentration less than the first n-type dopant concentration;
- and
- a third n-type portion having a third n-type dopant concentration different than the first n-type dopant concentration and different than the second n-type dopant concentration,
- the third n-type portion is between the first n-type portion and the second n-type portion,
- the first n-type portion is a first distance from the top surface of the substrate,
- the second n-type portion is a second distance from the top surface of the substrate,
- the third n-type portion is a third distance from the top surface of the substrate,
- the third n-type dopant concentration is the maximum dopant concentration of the n-type region,
- the second distance is greater than the first distance, and
- the second distance is greater than two times the third distance;
- a buffer layer over the n-type region;
- a first III-V compound layer over the buffer layer;
- a second III-V compound layer over the first III-V compound layer;
- and
- a metal structure over the second III-V compound layer, wherein the top surface of the substrate faces the metal structure.
19 more elements
A semiconductor device, comprising:
- a substrate including a p-type region;
- an n-type region in the p-type region, comprising:
- a first n-type portion having a first n-type dopant concentration at a top surface of the substrate;
- a second n-type portion below the first n-type portion and having a second n-type dopant concentration, wherein the second n-type dopant concentration is greater than the first n-type dopant concentration and the second n-type dopant concentration is a maximum n-type dopant concentration in the n-type region;
- and
- a third n-type portion having a third n-type dopant concentration less than the first n-type dopant concentration at an interface of the p-type region and the n-type region;
- a buffer layer over the n-type region;
- a first III-V compound layer over the buffer layer;
- a second III-V compound layer over the first III-V compound layer;
- a high electron mobility transistor (HEMT) over the second III-V compound layer, wherein the top surface of the substrate faces the HEMT;
- and
- a coplanar waveguide over the second III-V compound layer to convey an electrical signal during operation of the HEMT.
9 more elements
A semiconductor structure, comprising:
- a substrate comprising a p-type region;
- a free electron inversion layer in the substrate over the p-type region, wherein:
- the free electron inversion layer is an n-type region having a dopant concentration that continually increases from a top surface of the substrate to a first depth within the n-type region, and then continually decreases from the first depth to a bottom surface of the n-type region interfacing with the p-type region, and
- a maximum value of the dopant concentration is closer to the top surface of the substrate than to the bottom surface of the n-type region interfacing with the p-type region;
- a buffer layer over the free electron inversion layer;
- a first III-V compound layer over the buffer layer;
- a second III-V compound layer over the first III-V compound layer;
- and
- a metal structure over the second III-V compound layer.
6 more elements
Dependencies are inferred from the claim text.