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US 12,733,154 B2Granted
Memory device and fabrication method thereof
AssigneeNanya Technology Corporation
InventorJhen-Yu Tsai
Life of this patent
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Abstract
A memory device comprises a substrate; a first word line structure, a first dielectric layer; a dielectric liner, and a bit line structure. The first word line structure is in the substrate and comprises a first bottom conductive material and a first top conductive material, in which a top surface of the first bottom conductive material is wider than a bottom surface of the first top conductive material. The first dielectric layer is over the first word line structure. The dielectric liner lines the first word line structure. The bit line structure is over the substrate.
Claims9
A memory device, comprising:
- a substrate;
- a first word line structure in the substrate, comprising:
- a first bottom conductive material;
- and
- a first top conductive material over the first bottom conductive material, wherein a top surface of the first bottom conductive material is wider than a bottom surface of the first top conductive material;
- a first dielectric layer over the first word line structure;
- a dielectric liner lining the first word line structure, wherein the first top conductive material has a first sidewall and a second sidewall opposite to the first sidewall, the first sidewall is in contact with the first dielectric layer and the second sidewall is in contact with the dielectric liner;
- and
- a bit line structure over the substrate.
6 more elements
Dependencies are inferred from the claim text.