Rate-matching for transport block processing over multiple slots for physical uplink shared channel
AssigneeIntel Corporation
InventorsGregory Ermolaev, Gang Xiong, Sergey Sosnin
Life of this patent
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Abstract
Various embodiments herein provide techniques for uplink transport block transmission over multiple slots, e.g. using bit interleaving and/or rate matching. Other embodiments may be described and claimed.
Claims16
One or more non-transitory computer-readable media (NTCRM) having instructions, stored thereon, that when executed by one or more processors of a user equipment (UE) configure the UE to:
- receive an allocation of slots for transmission of a transport block over multiple slots, wherein the transport block corresponds to a physical uplink shared channel (PUSCH) transmission;
- and
- perform bit interleaving of the transport block within each individual slot of the multiple that are allocated for transmission of the transport block,
- wherein for performing the bit interleaving, a starting position of coded bits for bit selection for each slot is based on a number of the allocated slots and a rate-matching size of the PUSCH transmission.
One or more non-transitory computer-readable media (NTCRM) having instructions, stored thereon, that when executed by one or more processors of a next generation Node B (gNB) configure the gNB to:
- allocate slots for a user equipment (UE) to transmit a transport block over multiple slots, wherein the transport block corresponds to a physical uplink shared channel (PUSCH) transmission;
- and
- receive the transport block in the allocated slots, wherein coded bits of the transport block are interleaved within individual slot of the multiple that are allocated for transmission of the transport block, such that a starting position of the coded bits for bit selection for each slot is based on a number of the allocated slots and a rate-matching size of the PUSCH transmission.
An apparatus to be implemented in a user equipment (UE), the apparatus comprising:
- an interface to receive a transport block for a physical uplink shared channel (PUSCH) transmission over multiple slots;
- and
- processor circuitry coupled to the interface, the processor circuitry to:
- divide coded bits from individual code blocks of the transport block into multiple segments based on a number of slots allocated for transmission of the transport block;
- perform bit interleaving of the transport block within each individual slot of the multiple slots,
- wherein for the bit interleaving, a starting position of the coded bits for bit selection for each slot is based on a number of the allocated slots and a rate-matching size of the PUSCH transmission, and
- encode the transport block for transmission with the segments from different code blocks interleaved into individual slots of the allocated slots.
Dependencies are inferred from the claim text.