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US 12,732,402 B2Granted
DC balanced transition encoding
AssigneeSamsung Display Co., Ltd.
InventorAliazam Abbasfar
Life of this patent
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Abstract
A system and method for DC balanced transition encoding. In some embodiments, the method includes: generating a set of candidate encoding keys for a set of raw data words; selecting a first encoding key, of the set of candidate encoding keys, based on a first disparity contribution; and encoding the raw data words with the first encoding key, the first disparity contribution being a difference between the number of ones and the number of zeros in the result of encoding the set of raw data words with the first encoding key.
Claims20
A method, comprising:
- generating a set of candidate encoding keys for a set of raw data words;
- encoding the set of the raw data words using the set of candidate encoding keys to generate encoded packets;
- determining a disparity for each of the encoded packets;
- selecting an encoded packet, from among the encoded packets with a minimum disparity from among the disparity for each of the encoded packets;
- and
- transmitting the encoded packet to a driver.
3 more elements
A system, comprising:
- a processing circuit;
- and
- a memory connected to the processing circuit, the memory storing instructions that, when executed by the processing circuit, cause the system to perform a method, the method comprising:
- generating a set of candidate encoding keys for a set of raw data words;
- encoding the set of the raw data words using the set of candidate encoding keys to generate encoded packets;
- determining a disparity for each of the encoded packets;
- selecting an encoded packet, from among the encoded packets with a minimum disparity from among the disparity for each of the encoded packets;
- and
- transmitting the encoded packet to a driver.
6 more elements
A display, comprising:
- a timing controller;
- and
- a driver integrated circuit,
- the timing controller comprising:
- a processing circuit;
- and
- a memory connected to the processing circuit, the memory storing instructions that, when executed by the processing circuit, cause the timing controller to perform a method, the method comprising:
- generating a set of candidate encoding keys for a set of raw data words;
- encoding the set of the raw data words using the set of candidate encoding keys to generate encoded packets;
- determining a disparity for each of the encoded packets;
- selecting an encoded packet, from among the encoded packets with a minimum disparity from among the disparity for each of the encoded packets;
- and
- transmitting the encoded packet to the driver integrated circuit.
10 more elements
Dependencies are inferred from the claim text.