Passive equalizer with front-end level-shifter (FELS)

A receiver analog front-end (RX AFE) circuit coupled between one or more input terminals and corresponding one or more inputs of an analog signal processing circuit, the RX AFE circuit comprising:

• a programmable front-end level-shifter (FELS) CMFB circuit to receive an incoming agnostic CM signal on the one or more input terminals, detect a first voltage level of the incoming agnostic CM signal, and level shift the incoming agnostic CM signal to obtain a CM signal having a second voltage level corresponding to the analog signal processing circuit;
• a passive resistor-inductor-capacitor (RLC) network to attenuate the CM signal by an alternating current (AC) attenuation in an AC-coupled mode or a direct current (DC) attenuation in a DC-coupled mode, while providing boost for long tail equalization (LTEQ) and low-pass filtering (LPF) for the analog signal processing circuit;
• and
• a CM buffer to track the incoming agnostic CM signal in the DC-coupled mode during a FELS squelch operation.

A receiver circuit comprising:

• differential input terminals;
• a Continuous-Time Linear Equalizer (CTLE) having differential inputs;
• and
• an analog front-end (RX AFE) circuit coupled between the differential input terminals and the differential inputs, wherein the RX AFE circuit comprises:
• a programmable front-end level-shifter (FELS) CMFB circuit to receive an incoming agnostic CM signal on the differential input terminals, detect a first voltage level of the incoming agnostic CM signal, and level shift the incoming agnostic CM signal to obtain a CM signal having a second voltage level corresponding to the CTLE;
• a passive resistor-inductor-capacitor (RLC) network to attenuate the CM signal by an alternating current (AC) attenuation in an AC-coupled mode or a direct current (DC) attenuation in a DC-coupled mode, while providing boost for long tail equalization (LTEQ) and low-pass filtering (LPF) for the CTLE;
• and
• a CM buffer to track the incoming agnostic CM signal in the DC-coupled mode during a FELS squelch operation.

A system for high-speed network communication, the system comprising:

• a processing unit;
• and
• a network interface coupled to the processing unit, wherein the network interface comprises a receiver device comprising:
• an input terminal;
• an analog signal processing circuit;
• and
• a front-end equalizer circuit coupled between the input terminal and the analog signal processing circuit, wherein the front-end equalizer circuit comprises a programmable common mode feedback (CMFB) circuit and a passive resistor-inductor-capacitor (RLC) network, wherein:
• the programmable CMFB circuit is to receive, from the input terminal, an incoming agnostic common-mode (CM) signal having a first voltage level and a differential peak-to-peak voltage in at least one of an alternating current coupled mode (AC-coupled mode) or a direct current-coupled mode (DC-coupled mode);
• the programmable CMFB circuit is to level shift the incoming agnostic CM signal to a CM signal having a second voltage level using an adjustable current source, the second voltage level corresponding to the analog signal processing circuit;
• and
• the passive RLC network is to provide AC attenuation and DC attenuation over an attenuation range, while providing boost for long tail equalization (LTEQ) and low-pass filtering (LPF) for the analog signal processing circuit.