Processing system and instruction transmission method
AssigneeAlibaba (China) Co., Ltd.
InventorsZhe Zhang, Shuangchen Li, Linyong Huang, Hongzhong Zheng
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Abstract
Embodiments of this disclosure provide a processing system and an instruction transmission method. The instruction transmission method includes: receiving a processor instruction from a main processor communicatively coupled to an interface unit; generating an accelerator instruction corresponding to the processor instruction; determining a target accelerator corresponding to the accelerator instruction from a plurality of accelerators communicatively coupled to a first bus network; and transmitting the accelerator instruction to the target accelerator through the first bus network.
Claims14
A processing system, comprising:
- at least one main processor configured to output a processor instruction;
- at least one interface unit arranged corresponding to the at least one main processor and comprising:
- an interface front end communicatively coupled to the main processor and configured to receive the processor instruction, to generate an accelerator instruction corresponding to the processor instruction, and to transmit the accelerator instruction;
- and
- an interface register configured to receive the transmitted accelerator instruction and to forward the accelerator instruction, or to receive a response to the accelerator instruction;
- at least one accelerator configured to process the forwarded accelerator instruction to obtain the response to the accelerator instruction;
- and
- a first bus network communicatively coupled between the at least one interface unit and the at least one accelerator and configured to transmit the accelerator instruction to a corresponding accelerator of the at least one accelerator, or to transmit the response to the accelerator instruction to the interface register.
An instruction transmission method, comprising:
- receiving a processor instruction from a main processor communicatively coupled to an interface unit;
- generating an accelerator instruction corresponding to the processor instruction;
- determining a target accelerator corresponding to the accelerator instruction from a plurality of accelerators communicatively coupled to a first bus network;
- and
- transmitting the accelerator instruction to the target accelerator through the first bus network.
A non-transitory computer-readable storage medium storing instructions, when executed by a processing system, cause the processing system to perform operations for transmitting an instruction, the operations comprising:
- receiving a processor instruction from a main processor communicatively coupled to an interface unit;
- generating an accelerator instruction corresponding to the processor instruction;
- determining a target accelerator corresponding to the accelerator instruction from a plurality of accelerators communicatively coupled to a first bus network;
- and
- transmitting the accelerator instruction to the target accelerator through the first bus network.
Dependencies are inferred from the claim text.