Low leakage charge/discharge circuit

A structure comprising:

• a positive supply voltage node at a positive supply voltage level;
• a first input node connected to an output node of a charge pump to receive a variable output voltage;
• an N-type field effect transistor (NFET) and a first P-type field effect transistor (PFET) connected in series between the positive supply voltage node and the first input node, wherein a gate of the NFET is connected to a drain region of the first PFET;
• a second PFET connected in parallel with the NFET between the positive supply voltage node and the first PFET;
• and
• a capacitor connected between the first input node and ground.

A structure comprising:

• a positive supply voltage node at a positive supply voltage level;
• a first input node connected to an output node of a charge pump to receive a variable output voltage from the charge pump;
• a second input node connected to receive a first enable signal;
• an N-type field effect transistor (NFET) and a first P-type field effect transistor (PFET) connected in series between the positive supply voltage node and the first input node, wherein a gate of the NFET is connected to a drain region of the first PFET;
• a second PFET connected in parallel with the NFET between the positive supply voltage node and the first PFET;
• a capacitor connected between the first input node and ground;
• a voltage level shifter having two input terminals connected to the first input node and to the second input node, respectively, and an output terminal connected to a gate of the first PFET, wherein the voltage level shifter outputs a level-shifted voltage to the gate of the first PFET based on the variable output voltage and the first enable signal;
• and
• an inverter connected between the second input node and a gate of the second PFET, wherein the inverter is configured to output a second enable signal to the gate of the second PFET and wherein the second enable signal is inverted relative to the first enable signal.