Power clamp circuit and electronic device including power clamp circuit

An electronic device comprising:

• a pad;
• an internal circuit coupled to the pad, a first power rail through which a supply voltage is provided, and a second power rail through which a ground voltage is provided;
• and
• a power clamp circuit configured to protect the internal circuit when an electro-static discharge (ESD) event occurs,
• wherein the power clamp circuit includes:
• an ESD current discharge circuit including a first MOS transistor, a second MOS transistor, and a third MOS transistor that are coupled in series between the first power rail and the second power rail;
• a voltage branch circuit configured to provide a first branch voltage and a second branch voltage,
• a first triggering circuit including a first resistor, a first capacitor, and a fourth MOS transistor and configured to trigger the first MOS transistor;
• a second triggering circuit including a second resistor, a second capacitor, and a fifth MOS transistor and configured to trigger the second MOS transistor;
• and
• a third triggering circuit including a third resistor and a third capacitor, and configured to turn off the third MOS transistor during a normal operation and to turn on the third MOS transistor when the ESD event occurs,
• wherein the first triggering circuit is configured to provide the first branch voltage generated by the voltage branch circuit to a gate of the first MOS transistor,
• wherein the second triggering circuit is configured to provide the second branch voltage generated by the voltage branch circuit to a gate of the second MOS transistor, and
• wherein the voltage branch circuit is configured to provide the first branch voltage of at least 60% of a voltage applied to the first power rail, and to provide the second branch voltage of at least 30% of a voltage applied to the first power rail.