Nanocrystal array, laser device, and display device
AssigneeHon Hai Precision Industry Co., Ltd.
InventorsKuo-Bin Hong, Shih-Chen Chen, Chun-Yen Peng, Hao-Chung Kuo
Life of this patent
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Abstract
A nanocrystal array, a laser device, and a display device are provided. The nanocrystal array includes a plurality of nanorods arranged in an array. Each nanorod includes a nanorod buffer layer, a first type semiconductor layer, a tunnel junction layer, a second type semiconductor layer, a multi-quantum well, and another first type semiconductor layer successively stacked on each other. The laser device and the display device include the nanocrystal array. The present disclosure may reduce the laser threshold and increase output power, and further improve the resolution and image quality of the display device.
Claims14
A laser device comprising:
- a substrate comprising a first surface and a second surface opposite to the first surface, the first surface being recessed toward the second surface to form at least one hole;
- at least one drain electrode formed in the at least one hole;
- a nanocrystal array located on each of the at least one drain electrode, the nanocrystal array comprising a plurality of nanorods arranged in an array, each of the plurality of nanorods comprising a nanorod buffer layer, a first type semiconductor layer, a tunnel junction layer, a second type semiconductor layer, a multi-quantum well, and another first type semiconductor layer successively stacked on each other;
- a conductive layer located on the nanocrystal array;
- and
- an electrode layer located on the conductive layer;
- wherein the substrate comprises a silicon substrate, a first insulation layer, and a semiconductor layer successively stacked on each other;
- the silicon substrate has a main surface with (100) crystal plane, the first insulation layer is located on the main surface, a surface of the semiconductor layer away from the first insulation layer is defined as the first surface, and a surface of the silicon substrate away from the first insulation layer is defined as the second surface;
- the at least one hole penetrates through the semiconductor layer and extends into the silicon substrate, each of the at least one hole defines a sidewall and a bottom surface connected to the sidewall, the bottom surface is inclined with the silicon substrate, and a (111) crystal plane of the silicon substrate is exposed from the bottom surface.
A display device comprising:
- a casing;
- and
- a laser device located in the casing, the laser device comprising:
- a substrate comprising a first surface and a second surface opposite to the first surface, the first surface being recessed toward the second surface to form at least one hole;
- a drain electrode formed in each of the at least one hole;
- a nanocrystal array located on the drain electrode, the nanocrystal array comprising a plurality of nanorods arranged in an array, each of the plurality of nanorods comprising a nanorod buffer layer, a first type semiconductor layer, a tunnel junction layer, a second type semiconductor layer, a multi-quantum well, and another first type semiconductor layer successively stacked on each other;
- a conductive layer located on the nanocrystal array;
- and
- an electrode layer located on the conductive layer;
- wherein the substrate comprises a silicon substrate, a first insulation layer, and a semiconductor layer successively stacked on each other;
- the silicon substrate has a main surface with (100) crystal plane, the first insulation layer is located on the main surface, a surface of the semiconductor layer away from the first insulation layer is defined as the first surface, and a surface of the silicon substrate away from the first insulation layer is defined as the second surface;
- the at least one hole penetrates through the semiconductor layer and extends into the silicon substrate, each of the at least one hole defines a sidewall and a bottom surface connected to the sidewall, the bottom surface is inclined with the silicon substrate, and a (111) crystal plane of the silicon substrate is exposed from the bottom surface.
Dependencies are inferred from the claim text.