Column control circuits and storage devices

A column control circuit, comprising:

• a delay control circuit, configured to receive a column selection start signal and perform delay processing on the column selection start signal to generate and output a column selection end signal, the column selection end signal having a first delay amount relative to the column selection start signal;
• and
• a control signal generation circuit, connected to the delay control circuit and configured to:
• receive the column selection start signal, the column selection end signal, and a target bank group selection signal, and perform a first logical operation on the column selection start signal and the target bank group selection signal to generate and output a target column selection start signal;
• and generate and output a target column selection window signal based on the column selection start signal and the target bank group selection signal, and perform a second logical operation on the target column selection window signal and the column selection end signal to generate and output a target column selection end signal,
• the target column selection window signal having a second delay amount relative to the column selection start signal, the second delay amount being less than or equal to the first delay amount, and active duration of the target column selection window signal being greater than or equal to active duration of the target bank group selection signal.