US 12,731,626 B2 · Selective ferroelectric deployment for single-transistor, multiple-capacitor devices

Abstract

A memory device includes a group of ferroelectric capacitors with a shared plate that extends through the ferroelectric capacitors, has a greatest width between ferroelectric capacitors, and is coupled to an access transistor. The shared plate may be vertically between ferroelectric layers of the ferroelectric capacitors at the shared plate's greatest width. The memory device may include an integrated circuit die and be coupled to a power supply. Forming a group of ferroelectric capacitors includes forming an opening through an alternating stack of insulators and conductive plates, selectively forming ferroelectric material on the conductive plates rather than the insulators, and forming a shared plate in the opening over the ferroelectric material.

Claims20

Dependent claims

A memory device, comprising:

a plurality of vertically aligned ferroelectric capacitors, wherein individual ones of the ferroelectric capacitors comprise:
an outer plate;
a ferroelectric layer internal to the outer plate, wherein individual ones of the ferroelectric layers are not contiguous to each other;
and
an individual portion of a shared inner plate extending through individual ones of the ferroelectric layers and the outer plates, wherein the inner plate has a first width within a first one of the ferroelectric capacitors, a second width within a second one of the ferroelectric capacitors, and a third width between the first and second ones of the ferroelectric capacitors, the third width being greater than the first and second widths;
and
an access transistor coupled to the inner plate.

4 more elements

Dependencies are inferred from the claim text.

Selective ferroelectric deployment for single-transistor, multiple-capacitor devices

Life of this patent

Selective ferroelectric deployment for single-transistor, multiple-capacitor devices

Life of this patent

Abstract

Claims20