Route-based cell merging

A non-transitory computer readable medium comprising instructions that, when executed by at least one processor, configure the at least one processor to perform operations comprising:

• accessing, from memory, a circuit design comprising a clock tree that interconnects a clock source to a plurality of clock sinks through a plurality of components;
• generating a routing tree that represents at least a portion of the clock tree including a portion of the plurality of components;
• identifying two or more components of the portion of the plurality of components in the routing tree that are part of a direct fanout of a common node representing a set of components of the plurality of components;
• determining that the identified two or more components satisfy a mergeability function that defines whether or not components can be merged;
• and
• in response to determining that the identified two or more components satisfy the mergeability function, modifying at least a portion of the clock tree by merging the set of components into a single component.

A system comprising:

• one or more processors;
• and
• a memory storing instructions that, when executed by the one or more processors, cause the system to perform operations comprising:
• accessing, from memory, a circuit design comprising a clock tree that interconnects a clock source to a plurality of clock sinks through a plurality of components;
• generating a routing tree that represents at least a portion of the clock tree including a portion of the plurality of components;
• identifying two or more components of the portion of the plurality of components in the routing tree that are part of a direct fanout of a common node representing a set of components of the plurality of components;
• determining that the identified two or more components satisfy a mergeability function that defines whether or not components can be merged;
• and
• in response to determining that the identified two or more components satisfy the mergeability function, modifying at least a portion of the clock tree by merging the set of components into a single component.