Mechanisms for processing memory requests based on criticality

A method, comprising:

• performing, by a memory system of a computer system, a write turn in which a plurality of write requests to write data to one or more memory devices are processed, wherein the memory system includes a set of write queues configured to store write requests;
• receiving, by the memory system during the write turn, a read request from processor circuitry of the computer system, wherein the read request is identified as critical by the processor circuitry;
• tracking, by the memory system over a set of previous turns, a number of instances of a fill level of the set of write queues satisfying a write heavy threshold;
• determining, by the memory system, whether transitioning to a read turn from the write turn without completing the write turn is permitted according to a set of activation criteria, wherein the set of activation criteria includes a criterion that the number of instances does not satisfy a threshold number of instances;
• in response to determining that the set of activation criteria is satisfied, the memory system transitioning to the read turn from the write turn without completing the write turn;
• and
• processing, by the memory system, the read request during the read turn.

A system, comprising:

• processor circuitry that includes cache circuitry configured to issue memory requests and assign one of a plurality of criticality values to a given one of the memory requests;
• and
• a memory system configured to couple to one or more memory devices and to receive ones of the memory requests, wherein the memory system is configured to:
• perform a first turn in which a plurality of memory requests of a first request type are processed;
• receive, during the first turn, a memory request of a second request type;
• issue, upon the reception of the memory request, a request to the processor circuitry to provide a criticality value of the memory request;
• based on the criticality value of the memory request, transition, to process the memory request, from the first turn to a second turn without completing the first turn;
• and
• perform the second turn in which a plurality of memory requests of the second request type are processed.