Segregating logical to physical mappings
AssigneeMicron Technology, Inc.
InventorsRitesh Tiwari, Giuseppe Cariello
Life of this patent
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Abstract
Methods, systems, and devices for segregating logical to physical mappings are described. A memory system may segregate L2P mappings based on one or more characteristics of the data associated with to the L2P mappings. The memory system may determine whether a logical address included in a write command is associated with a first characteristic, a second characteristic, or some other characteristic. The memory system may write an L2P mapping to a first block of memory cells, a second block of memory cells, or some other block of memory cells based on the determined characteristic of the L2P mapping. The block of memory cells that the L2P mapping is written to may include other mappings having data with a same (or similar) characteristic.
Claims19
An apparatus, comprising:
- a memory system comprising a volatile memory and a non-volatile memory;
- and
- a controller associated with a memory device, wherein the controller is configured to cause the apparatus to:
- receive, at the memory system, a write command that comprises data and a logical address corresponding to a physical address associated with the memory system;
- determine whether the logical address is associated with a first characteristic based at least in part on receiving the write command, wherein the first characteristic is associated with a quantity of access operations performed on the logical address satisfying a threshold value, and wherein, to determine whether the logical address is associated with the first characteristic, the controller is configured to cause the apparatus to:
- determine a quantity of access operations associated with the logical address included in the write command;
- and
- write, to a first block of memory cells of the memory system, a mapping between the logical address and the corresponding physical address based at least in part on determining that the logical address is associated with the first characteristic.
An apparatus, comprising:
- a memory system comprising a volatile memory and a non-volatile memory;
- and
- a controller associated with a memory device, wherein the controller is configured to cause the apparatus to:
- receive, at the memory system, a write command that comprises data and a logical address corresponding to a physical address associated with the memory system;
- receive a command indicating that the logical address is associated with a first characteristic;
- determine whether the logical address is associated with the first characteristic based at least in part on receiving the command indicating that the logical address is associated with the first characteristic, wherein the first characteristic is associated with a quantity of access operations performed on the logical address satisfying a threshold value;
- and
- write, to a first block of memory cells of the memory system, a mapping between the logical address and the corresponding physical address based at least in part on determining that the logical address is associated with the first characteristic.
A non-transitory computer-readable medium storing code comprising instructions which, when executed by a processor of an electronic device, cause the electronic device to:
- receive, at a memory system, a write command that comprises data and a logical address corresponding to a physical address associated with the memory system;
- determine whether the logical address is associated with a first characteristic based at least in part on receiving the write command, wherein the first characteristic is associated with a quantity of access operations performed on the logical address satisfying a threshold value, and wherein, to determine whether the logical address is associated with the first characteristic, the instructions, when executed by the processor, cause the electronic device to:
- determine a quantity of access operations associated with the logical address included in the write command;
- and
- write, to a first block of memory cells of the memory system, a mapping between the logical address and the corresponding physical address based at least in part on determining that the logical address is associated with the first characteristic.
A method, comprising:
- receiving, at a memory system, a write command that comprises data and a logical address corresponding to a physical address associated with the memory system;
- determining whether the logical address is associated with a first characteristic based at least in part on receiving the write command, wherein the first characteristic is associated with a quantity of access operations performed on the logical address satisfying a threshold value, and wherein determining whether the logical address is associated with the first characteristic comprises:
- determining a quantity of access operations associated with the logical address included in the write command;
- and
- writing, to a first block of memory cells of the memory system, a mapping between the logical address and the corresponding physical address based at least in part on determining that the logical address is associated with the first characteristic.
Dependencies are inferred from the claim text.