US 12,730,717 B2 · ECC configuration in memories

Abstract

The present disclosure relates to a method for operating an array of memory cells, the method comprising storing user data in a plurality of memory cells of the array, storing parity data associated with the user data in a plurality of parity cells of the array, and, based on the stored parity data, selecting an Error Correction Code (ECC) correction capability and/or an ECC granularity according to which an ECC operation is to be performed, wherein the selection of the ECC correction capability and/or the ECC granularity is determined by the steps of updating a first register, said first register comprising values which indicate a required ECC correction capability and/or a required ECC granularity to be applied to the memory cells based on a current status of said memory cells, wherein the values of the first register are updated based on a variation of the current status of the memory cells, and wherein an update of the values of the first register corresponds to a variation of the required ECC correction capability and/or a required ECC granularity to be applied to said memory cells, and based on the updated values of the first register, executing an ECC switch command, wherein the ECC switch command is such as to vary a previously selected ECC correction capability and/or a previously selected ECC granularity, the method further comprising: updating a second register according to the varied ECC correction capability and/or ECC granularity, said second register comprising values indicating the selected ECC correction capability and the selected ECC granularity applied to the memory cells based on the current status thereof. Related apparatuses and systems are also herein disclosed.

Claims20

Dependent claims

An apparatus, comprising:

an array of memory cells configured to store user data and corresponding parity data;
and
a controller coupled to the array and comprising error correction code (ECC) circuitry, wherein the controller is configured to:
receive first information from a first register, the first register being configured to be updated based on a variation of a current status of group of memory cells, wherein updated values of the first information correspond to a variation of a current ECC correction capability and/or a current ECC granularity to be applied to a group of memory cells;
based on receiving updated first information from the first register, enable an ECC switch command to:
cause a selection of a particular ECC correction capability and/or a particular ECC granularity corresponding to the updated first information;
and
update second information stored in a second register, wherein the second information corresponds to the current ECC correction capability and/or the current ECC granularity to be applied to the group of memory cells such that updating the second information involves replacing the current ECC correction capability and/or the current ECC granularity with the particular ECC correction capability and/or the particular ECC granularity.

5 more elements

A method, comprising:

storing user data and corresponding parity data in an array of memory cells;
receiving, at a controller coupled to the array and comprising error correction code (ECC) circuitry, first information from a first register, the first register being configured to be updated based on a variation of a current status of group of memory cells, wherein updated values of the first information correspond to a variation of a current ECC correction capability and/or a current ECC granularity to be applied to a group of memory cells;
based on receiving updated first information from the first register, executing an ECC switch command to:
cause a selection of a particular ECC correction capability and/or a particular ECC granularity corresponding to the updated first information;
and
update second information stored in a second register, wherein the second information corresponds to the current ECC correction capability and/or the current ECC granularity to be applied to the group of memory cells such that updating the second information involves replacing the current ECC correction capability and/or the current ECC granularity with the particular ECC correction capability and/or the particular ECC granularity.

3 more elements

An apparatus, comprising:

memory cells adapted to store user data, parity data, a first register, and a second register;
and
a controller configured to:
based on first information stored in the first register, select an error correction code (ECC) correction capability and/or an ECC granularity on which an ECC engine of the apparatus operates;
write second information into the second register, the second register storing values indicating the selected ECC correction capability and the selected ECC granularity currently applied to the memory cells;
receive the first information from the first register, the first register storing values indicating a particular ECC correction capability and/or a particular ECC granularity to be applied to the memory cells based on a current status of the memory cells, wherein the first register is configured to be updated based on a variation of the current status of the memory cells, and wherein an update of the values of the first register corresponds to a variation of the particular ECC correction capability and/or the particular ECC granularity to be applied to the memory cells;
and
upon receiving the updated values of the first register, determine whether or not to enable an ECC switch command, wherein the ECC switch command is executable to cause the variation of a previously selected ECC correction capability and/or ECC granularity based on the particular ECC correction capability and/or the particular ECC granularity of the first register.

5 more elements

Dependencies are inferred from the claim text.

ECC configuration in memories

Life of this patent

ECC configuration in memories

Life of this patent

Abstract

Claims20