Embedded system start control method and apparatus, and storage medium and electronic device

An embedded system, comprising a chip, a memory and at least two operating systems, wherein

• the chip comprises a processor, a hardware controller, a first bus, and a second bus;
• a bandwidth of the second bus is higher than a bandwidth of the first bus, the second bus is configured as a multi-master and multi-slave mode, and the first bus is configured as a one-master and multi-slave mode;
• the at least two operating systems run on the basis of the processor, wherein processing resources of the processor are dynamically allocated to the at least two operating systems, and the processing resources of the processor comprise processor cores;
• the at least two operating systems communicate with each other by means of the second bus;
• the at least two operating systems control the hardware controller by means of the first bus;
• and the at least two operating systems are configured to:
• control, via a first bus, a hardware controller of a target device by a first operating system that runs on a first processor core of a processor, so as to control a running state of the target device, wherein an embedded system comprises the first operating system;
• boot a second operating system to start on a second processor core of the processor, wherein the embedded system comprises the second operating system, a response speed of the first operating system is higher than a response speed of the second operating system, the first operating system communicates with the second operating system via a second bus, and a bandwidth of the second bus is higher than a bandwidth of the first bus;
• and
• after the second operating system is started, take over, by the second operating system, the hardware controller via the first bus, so as to take over control power of the target device,
• wherein the memory comprises a data storage area and a metadata storage area, wherein the data storage area is divided into a plurality of storage units, and each storage unit is configured to store service data, and the metadata storage area is configured to store size and occupied state of each storage unit of the data storage area, wherein the data storage area further comprises a plurality of memory channels, and each memory channel is formed by one or more of the plurality of storage units, wherein the metadata storage area stores a plurality of records, and each record is configured to record metadata of one memory channel, and wherein the metadata of each memory channel at least comprises a channel ID of the memory channel, the size of the memory channel, and the occupied state of the memory channel;
• and
• wherein the at least two operating systems are further configured to:
• send, by the first operating system, the target data to a target virtual channel in the memory of the processor responsive to determination that the first operating system needs to transmit a target data to the second operating system, wherein sending comprises:
• reading records in the metadata storage area by the first operating system, and determining, according to the read records, at least one storage unit that is in an idle state in the data storage area and has a total space being greater than or equal to the length of target data, so as to obtain the target virtual channel, wherein determining further comprises traversing the records stored in the metadata storage area, and determining whether there is a first target record indicating that the memory channel is in the idle state and the size of the memory channel is greater than or equal to the length of the target data, and when there is the first target record, determining, as the target virtual channel, the memory channel indicated by the channel ID recorded in the first target record;
• and
• setting, to the occupied state, a state of each of the at least one storage unit corresponding to the target virtual channel in the metadata storage area, and storing the target data to the target virtual channel;
• send an interrupt notification message to the second operating system;
• and
• acquire, by the second operating system, the target data from the target virtual channel in the memory in response to the interrupt notification message.

A chip, comprising a programmable logic circuit and at least one of executable instructions, wherein the chip runs in an electronic device and is configured to:

• control, via a first bus, a hardware controller of a target device by a first operating system that runs on a first processor core of a processor, so as to control a running state of the target device, wherein an embedded system comprises the first operating system;
• boot a second operating system to start on a second processor core of the processor, wherein the embedded system comprises the second operating system, a response speed of the first operating system is higher than a response speed of the second operating system, the first operating system communicates with the second operating system via a second bus, and a bandwidth of the second bus is higher than a bandwidth of the first bus;
• and
• after the second operating system is started, take over, by the second operating system, the hardware controller via the first bus, so as to take over control power of the target device,
• wherein a memory of the processor comprises a data storage area and a metadata storage area, wherein the data storage area is divided into a plurality of storage units, and each storage unit is configured to store service data, and the metadata storage area is configured to store size and occupied state of each storage unit of the data storage area, wherein the data storage area further comprises a plurality of memory channels, and each memory channel is formed by one or more of the plurality of storage units, wherein the metadata storage area stores a plurality of records, and each record is configured to record metadata of one memory channel, and wherein the metadata of each memory channel at least comprises a channel ID of the memory channel, the size of the memory channel, and the occupied state of the memory channel;
• and
• wherein the chip is further configured to:
• send, by the first operating system, the target data to a target virtual channel in the memory of the processor in response to determination that the first operating system needs to transmit a target data to the second operating system, wherein sending further comprises:
• reading records in the metadata storage area by the first operating system, and determining, according to the read records, at least one storage unit that is in an idle state in the data storage area and has a total space being greater than or equal to the length of target data, so as to obtain the target virtual channel, wherein determining further comprises traversing the records stored in the metadata storage area, and determining whether there is a first target record indicating that the memory channel is in the idle state and the size of the memory channel is greater than or equal to the length of the target data, and when there is the first target record, determining, as the target virtual channel, the memory channel indicated by the channel ID recorded in the first target record;
• and
• setting, to the occupied state, a state of each of the at least one storage unit corresponding to the target virtual channel in the metadata storage area, and storing the target data to the target virtual channel;
• send an interrupt notification message to the second operating system;
• and
• acquire, by the second operating system, the target data from the target virtual channel in the memory in response to the interrupt notification message.