Device, method and system to capture or restore microarchitectural state of a processor core

A method at a processor core, the method comprising:

• fetching a first instruction comprising a first opcode which is to correspond to a first one or more components of the processor core;
• decoding the first instruction to generate a first decoded instruction;
• and
• executing the first decoded instruction, comprising saving a microarchitectural state of the first one or more components to a repository of the processor core.

A system comprising:

• a memory to store a plurality of instructions;
• a processor core coupled to the memory, the processor core comprising:
• fetch circuitry to fetch a first instruction of the plurality of instructions, the first instruction comprising a first opcode which is to correspond to a first one or more components of the processor core;
• a decoder circuit coupled to the fetch circuitry, the decoder circuit to decode the first instruction to generate a first decoded instruction;
• and
• an execution circuit coupled to receive the first decoded instruction, wherein the execution circuit is to execute the first decoded instruction to save a microarchitectural state of the first one or more components to a repository of the processor core.