Apparatus and method for processing floating-point numbers
AssigneeImagination Technologies Limited
InventorSam Elliott
Life of this patent
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Abstract
Circuits and associated methods for processing two floating-point numbers (A, B) to generate a sum (A+B) of the two numbers and a difference (A−B) of the two numbers include calculating (806) a sum (|A|+|B|) of the absolute values of the two floating-point numbers, using a same-sign floating-point adder (1020), to produce a first result. The method further comprises calculating (808) a difference (|A|−|B|) of the absolute values to produce a second result. The sum (A+B) and the difference (A−B) are generated (810, 812) based on the first result (|A|+|B|), the second result (|A|−|B|), and the sign of each floating-point number.
Claims7
A machine-implemented method of processing an input set in a graphics processing operation, the input set comprising two floating-point numbers (A, B), each of the floating-point numbers (A, B) having a sign, to generate a sum (A+B) and a difference (A−B) of the two floating-point numbers (A, B), the method comprising:
- receiving the two floating-point numbers (A, B) of the input set;
- calculating a sum of absolute values of the two floating-point numbers (A, B), using a same-sign floating-point adder, to produce a first result;
- calculating a difference of the absolute values of the two floating-point numbers (A, B), using a floating-point subtractor, to produce a second result;
- and
- generating the sum (A+B) of the two floating-point numbers (A, B) and the difference (A−B) of the two floating-point numbers (A, B) based on:
- the first result, the second result, and the sign of each of the floating-point numbers (A, B),
- wherein the sum (A+B) of the two floating-point numbers (A, B) and the difference (A−B) of the two floating-point numbers (A, B) are used in the graphics processing operation;
- and
- wherein the same-sign floating-point adder is implemented in fixed function circuitry configured to add together floating-point numbers having the same sign, and wherein the same-sign floating-point adder does not include circuitry configured to add together numbers having different signs.
A method of manufacturing, using an integrated circuit manufacturing system, a circuit configured to process an input set in a graphics processing operation, the input set comprising two floating-point numbers (A, B), each of the floating-point numbers (A, B) having a sign, to generate a sum (A+B) and a difference (A−B) of the two floating-point numbers (A, B), the circuit comprising:
- an input, configured to receive the two floating-point numbers (A, B) of the input set;
- a same-sign floating-point adder, configured to calculate a sum of absolute values of the two floating-point numbers (A, B), to produce a first result;
- a floating-point subtractor, configured to calculate a difference of the absolute values of the two floating-point numbers (A, B), to produce a second result;
- and
- multiplexing and sign-correction logic, configured to generate the sum (A+B) of the two floating-point numbers (A, B) and the difference (A−B) of the two floating-point numbers (A, B) based on:
- the first result, the second result, and the sign of each of the floating-point numbers (A, B),
- wherein the sum (A+B) of the two floating-point numbers (A, B) and the difference (A−B) of the two floating-point numbers (A, B) are used in the graphics processing operation;
- wherein the same-sign floating-point adder is implemented in fixed function circuitry configured to add together floating-point numbers having the same sign, and wherein the same-sign floating-point adder does not include circuitry configured to add together numbers having different signs,
- the method comprising:
- processing, using a layout processing system, a computer readable dataset description of the circuit so as to generate a circuit layout description of an integrated circuit embodying the circuit;
- and
- manufacturing, using an integrated circuit generation system, the circuit according to the circuit layout description.
Dependencies are inferred from the claim text.