Power regulation circuit for droop mitigation in a power source voltage that powers a processing core

An apparatus, comprising:

• a power rail configured to receive a power source voltage;
• a processing core that is powered by the power source voltage;
• a digitally controlled oscillator (DCO) to generate a core clock signal having a clock signal frequency that sets an operating frequency of the processing core;
• a power regulation circuit, comprising:
• a first droop detector to generate a first droop detection signal in a first detection state in response to detecting a first droop in the power source voltage, wherein the first droop detector comprises a high pass filter having a high band that includes a frequency range of the first droop;
• a second droop detector to generate a second droop detection signal in a second detection state in response to detecting a second droop in the power source voltage, wherein the second droop occurs after the first droop;
• and
• a frequency slowdown detection circuit to generate a frequency slowdown signal in a slowdown state in response to at least one of the first droop detection signal being in the first detection state and the second droop detection signal being in the second detection state, wherein the DCO is to slowdown the clock signal frequency in response to the frequency slowdown signal being in the slowdown state.

A power regulation circuit for a power source voltage that powers a processing core, the power regulation circuit comprising:

• a first droop detector to pass a high band so as to detect a first droop in a power source voltage and generate a first droop detection signal in a first detection state in response to detecting the first droop;
• a second droop detector to pass a passband to generate a second droop detection signal in a second detection state in response to detecting the second droop in the power source voltage, wherein the second droop occurs after the first droop;
• and
• a frequency slowdown detection circuit to generate a frequency slowdown signal in a slowdown state in response to at least one of the first droop detection signal being in the first detection state and the second droop detection signal being in the second detection state.