Current mirror pre-bias for increased transition speed

A circuital arrangement, comprising:

• a main current mirror comprising an input leg and an output leg, the input leg tied to the output leg at a first common node of the main current mirror, operation of the main current mirror comprising an inactive state and an active state;
• and
• a pre-charging circuit coupled to the first common node, the pre-charging circuit comprising:
• a first transistor coupled to the first common node, the first transistor configured to sense a voltage at the first common node during the inactive state, the active state and a transition phase from the inactive state to the active state;
• and
• a second transistor coupled to the first common node, the second transistor configured to source a pre-charge current to the first common node based on a voltage sensed at the first common node by the first transistor;
• wherein, during the inactive state, the voltage at the first common node is about zero volts and the first transistor is turned OFF.