Event detection system response controller
AssigneeRaytheon Company
InventorsGregory L. Bass, Vincent A. Pinedo
Life of this patent
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Abstract
An event detection system response controller for an electrical system includes at least one event detector (ED) digital filter submodule having a signal input and a signal output. The at least one ED digital filter submodule is configured to receive at least one event signal output from one or more event detectors at the signal input. Each of the at least one ED digital filter submodule includes a signal synchronizer, a signal filter, an interface validator, an interface validation filter, and a pulse shaper sequentially arranged from the signal input to the signal output.
Claims20
An event detection system response controller for an electrical system including one or more event detectors, the event detection system response controller comprising:
- at least one event detector (ED) digital filter submodule having a signal input and a signal output, the at least one ED digital filter submodule is configured to receive at least one event signal output from the one or more event detectors at the signal input, and each of the at least one ED digital filter submodule includes a signal synchronizer, a signal filter, an interface validator, an interface validation filter, and a pulse shaper sequentially arranged from the signal input to the signal output,
- the signal synchronizer synchronizes the at least one event signal output to a digital clock domain of the event detection system response controller to generate an array of synchronized signal outputs,
- the signal filter applies a first filtering criteria to the array of synchronized signal outputs to generate an array of filtered signal outputs,
- the interface validator validates the array of filtered signal outputs using a correlated relationship of the array of filtered signal outputs, and the interface validator generates a valid single-bit event output in response to validation of the array of filtered signal outputs,
- the interface validator filter applies a second filtering criteria to the valid single-bit event output to generate a single-bit filtered event output, and
- the pulse shaper shapes a pulse duration of the single-bit filtered event output to generate a single-bit ED digital filter output signal at the signal output.
An electrical system including:
- a host processor;
- one or more event detectors, and each of the one or more event detectors is configured to identify an occurrence of an event and generate an event output signal in response to the identification of the occurrence of the event;
- and
- an event detection system response controller connected in signal communication with and between the host processor and the one or more event detectors, the event detection system response controller includes at least one event detector (ED) digital filter submodule having a signal input and a signal output, the at least one ED digital filter submodule is configured to receive the event output signal from the one or more event detectors at the signal input, detect a false detection state of the event output signal, suppress the event output signal, and report the false detection state of the event output signal to the host processor, and each of the at least one ED digital filter submodule includes a signal filter, an interface validator, an interface validation filter, and a pulse shaper sequentially arranged from the signal input to the signal output.
Dependencies are inferred from the claim text.