Semiconductor package including a pad comprising a connection portion connecting a first and second pad portions

A semiconductor package comprising:

• a redistribution structure comprising at least one redistribution layer and at least one insulating layer alternately stacked;
• a semiconductor chip electrically connected to the at least one redistribution layer;
• and
• a plurality of bumps electrically connected to the at least one redistribution layer and arranged on one surface of the redistribution structure,
• wherein the at least one redistribution layer comprises a plurality of pads arranged to face the plurality of bumps, and
• wherein a surface of each of the plurality of pads that faces the plurality of bumps, has an aspect ratio greater than 2 and comprises first and second grooves.

A semiconductor package comprising:

• a redistribution structure comprising at least one redistribution layer and at least one insulating layer alternately stacked;
• a semiconductor chip electrically connected to the at least one redistribution layer;
• and
• a plurality of bumps electrically connected to the at least one redistribution layer and arranged on one surface of the redistribution structure,
• wherein the at least one redistribution layer comprises a plurality of pads arranged to face the plurality of bumps,
• wherein each of the plurality of pads comprises a surface contacting a respective bump of the plurality of bumps, the surface having an aspect ratio exceeding 2, and
• wherein a distance between adjacent ones of the plurality of bumps is shorter than a length of a major axis of each of the plurality of pads.