Semiconductor package

A method of manufacturing of a semiconductor device, the method comprising:

• mounting a semiconductor chip on a film, the semiconductor chip comprising an active surface, a connection pad on the active surface, and an inactive surface opposing the active surface and facing the film;
• forming a first encapsulant covering the semiconductor chip on the film;
• forming an interconnect structure on the inactive surface after removing the film, the interconnect structure comprising a redistribution pattern, and a vertical connection conductor;
• mounting a heat dissipation member on the vertical connection conductor;
• forming a second encapsulant covering the heat dissipation member on the interconnect structure, and
• forming an external shielding layer on at least a portion of an exterior surface of the second encapsulant, the external shielding layer contacting with an upper surface of the heat dissipation member.

A method of manufacturing of a semiconductor device, the method comprising:

• forming a frame on a film, the frame comprising an insulating layer, a wiring structure, a first through-hole, and a second through-hole,
• mounting a first semiconductor chip in the first through-hole and a second semiconductor chip in the second through-hole on the film, the first semiconductor chip comprising a first active surface facing the film, a first connection pad on the first active surface, and a first inactive surface opposing the first active surface, the second semiconductor chip comprising a second active surface, a second connection pad on the second active surface, and a second inactive surface opposing the second active surface and facing the film;
• forming a first encapsulant covering the first and second semiconductor chips on the film;
• forming an interconnect structure on the first active surface and on the second inactive surface after removing the film, the interconnect structure comprising a redistribution pattern electrically connecting with the wiring structure, and a vertical connection conductor;
• forming a backside wiring layer on the first encapsulant, the backside wiring layer connected with the second connection pad and wiring structure;
• mounting a passive component on the redistribution pattern and mounting a heat dissipation member on the vertical connection conductor;
• and
• forming a second encapsulant covering the passive component and the heat dissipation member on the interconnect structure.