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US 12,727,237 B2Granted
Semiconductor device and method for fabricating the same
AssigneeUnited Microelectronics Corp.
InventorsKuo-Hsing Lee, Chun-Hsien Lin, Yung-Chen Chiu, Sheng-Yuan Hsueh, Chi-Horn Pai
Life of this patent
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Abstract
A method for fabricating a semiconductor device includes the steps of first providing a substrate having a resistor region, forming a first gate structure on the resistor region, forming a first interlayer dielectric (ILD) layer around the first gate structure, transforming the first gate structure into a first metal gate having a gate electrode on the substrate and a hard mask on the gate electrode, and then forming a resistor on the first metal gate.
Claims18
A method for fabricating a semiconductor device, comprising:
- providing a substrate having a resistor region;
- forming a shallow trench isolation (STI) around the substrate on the resistor region;
- forming a first gate structure directly on the STI on the resistor region;
- forming a first interlayer dielectric (ILD) layer around the first gate structure;
- transforming the first gate structure into a first metal gate, wherein the first metal gate comprises:
- a gate electrode on the substrate;
- and
- a hard mask on the gate electrode;
- forming a second ILD layer on the first metal gate;
- forming a resistor on the first metal gate and the second ILD layer, wherein the resistor and the first metal gate are separated by the second ILD layer;
- and
- forming a first contact plug and a second contact plug adjacent to two sides of the first metal gate, wherein the first contact plug is a one-piece structure and penetrates the resistor and the second ILD layer, and a bottom surface of the first contact plug is lower than a top surface of the first metal gate.
9 more elements
A semiconductor device, comprising:
- a substrate having a resistor region;
- a shallow trench isolation (STI) around the substrate on the resistor region;
- a first gate structure directly on the STI on the resistor region, wherein the first gate structure comprises:
- a gate electrode on the substrate;
- and
- a hard mask on the gate electrode;
- a first interlayer dielectric (ILD) layer around the first gate structure;
- a second ILD layer on the first gate structure;
- a resistor directly on the first gate structure and the second ILD layer, wherein the resistor and the first gate structure are separated by the second ILD layer;
- and
- a first contact plug and a second contact plug adjacent to two sides of the gate structure, wherein the first contact plug is a one-piece structure and penetrates the resistor and the second ILD layer, and a bottom surface of the first contact plug is lower than a top surface of the first gate structure.
8 more elements
Dependencies are inferred from the claim text.