Combined charge balance and edge termination surface passivation for a semiconductor device and methods of fabricating the same

A semiconductor device, comprising:

• an epitaxial layer disposed on a semiconductor substrate, the epitaxial layer including an active region, in which at least one active element is formed, and an edge termination region, in which at least one edge termination structure is formed, the edge termination region being laterally adjacent to the active region;
• a charged layer disposed on an upper surface of the epitaxial layer, the charged layer covering at least a portion of the active region and extending laterally over at least a portion of the edge termination region;
• a doped layer in at least a portion of the epitaxial layer in the active region, the doped layer being disposed proximate an upper surface of the epitaxial layer and extending laterally into a portion of the edge termination region;
• and
• a first implant layer in at least a portion of the epitaxial layer in the edge termination region, the first implant layer being disposed proximate the upper surface of the epitaxial layer adjacent to an end of the doped layer and extending laterally at least partially across the edge termination region.

A method of forming a semiconductor device, the method comprising:

• forming an epitaxial layer on a semiconductor substrate, the epitaxial layer including an active region, in which at least one active element is formed, and an edge termination region, in which at least one edge termination structure is formed, the edge termination region being laterally adjacent to the active region;
• forming a charged layer on an upper surface of the epitaxial layer, the charged layer covering at least a portion of the active region and extending laterally over at least a portion of the edge termination region;
• and
• forming an implant layer in an upper surface of the epitaxial layer in the edge termination region, a charge balance in the edge termination region being controlled as a function of a polarity type and dimensions of the implant layer.

A method of forming an edge termination structure in a semiconductor device, the semiconductor device including an active region, in which one or more active structures are formed, and an edge termination region, in which the edge termination structure is formed, the edge termination region being laterally adjacent to the active region, the method comprising:

• forming an epitaxial layer on a semiconductor substrate, the epitaxial layer extending laterally across the active and edge termination regions;
• forming a plurality of active trenches in the active region and at least one edge trench in the edge termination region, each of the at least one edge trench and the plurality of active trenches extending vertically through at least a portion of the epitaxial layer;
• forming a first charged layer on at least exposed sidewalls of each of the active trenches and the at least one edge trench in a same processing step;
• and
• at least partially filling each of the at least one edge trench and the plurality of active trenches with a fill material in a same processing step to form a trench fill layer.