Multiple fin heights for effective width tuning
AssigneeInternational Business Machines Corporation
InventorsWilliam Murphy Parkin, Susan Ng Emans, Julien Frougier, Ruilong Xie, Andrew M. Greene
Life of this patent
Estimating the term…
Loading patent…
AssigneeInternational Business Machines Corporation
InventorsWilliam Murphy Parkin, Susan Ng Emans, Julien Frougier, Ruilong Xie, Andrew M. Greene
Estimating the term…
Embodiments of the present disclosure are directed to co-integrating multiple fin heights with bottom dielectric isolations for effective width tuning. In a non-limiting embodiment, a semiconductor structure includes a first shallow trench isolation (STI) region formed over a first portion of a substrate and a second STI region formed over a second portion of the substrate. A topmost surface of the second STI region is coplanar to a topmost surface of the first STI region. A first fin is formed in the first STI region and a second fin is formed in the second STI region. A topmost surface of the second fin is coplanar to a topmost surface of the first fin. A bottom dielectric isolation (BDI) region is positioned between the first fin and the substrate, thereby providing a first effective width and a second effective width for the first fin and second fin, respectively.
A semiconductor structure comprising:
A semiconductor structure comprising:
A semiconductor structure comprising:
A method for forming a semiconductor device, the method comprising:
A method for forming a semiconductor device, the method comprising:
Dependencies are inferred from the claim text.