Electronic devices and electronic device systems
AssigneeSamsung Electronics Co., Ltd.
InventorJungkyu Kook
Life of this patent
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Abstract
Provided is an electronic device system including a first electronic device including a first substrate, a second electronic device including a second substrate, and a data transferer including a first connector and a second connector, the data transferer configured to connect the first electronic device and the second electronic device, the first substrate including the first recess area and the second recess area spaced apart from the first recess area, and the first recess area and the second recess area are at a same depth.
Claims19
An electronic device system comprising:
- a first electronic device including a chip and a first substrate, the first substrate comprises
- a first conductive layer being an uppermost layer,
- a first insulating layer under and contacting the first conductive layer, and
- a second conductive layer under and contacting the first insulating layer;
- a second electronic device including a second substrate;
- and
- a data transferer including a first connector and a second connector, the data transferer configured to connect the first electronic device to the second electronic device,
- the first substrate defining a first recess area and a second recess area spaced apart from the first recess area, the first recess area and the second recess area are defined by the first conductive layer and at least a portion of the first insulating layer such that a bottommost surface of the second recess area is within or below the first insulating layer and the bottommost surface of the second recess area is at or above the second conductive layer,
- the chip is directly attached to the bottommost surface of the second recess area, and
- the first recess area and the second recess area are at a same depth.
An electronic device comprising:
- a substrate;
- a main processor chip on the substrate;
- and
- an external device connecting portion on the substrate;
- the external device connecting portion in a first recess area of the substrate,
- the main processor chip in a second recess area of the substrate, and
- the first recess area and the second recess area being formed by recessing an uppermost first layer of the substrate and a second layer below and contacting the uppermost first layer, a bottommost surface of the first recess area and the second recess area being a third layer below and contacting the second layer.
An electronic device comprising:
- a main processor chip configured to drive the electronic device;
- an external device connecting portion configured to connect the electronic device to an external electronic device;
- and
- a substrate defining a plurality of recess areas, the substrate comprises
- a first conductive layer being an uppermost layer,
- a first insulating layer under and contacting the first conductive layer, and
- a second conductive layer under and contacting the first insulating layer,
- the plurality of recess areas comprising
- at least one first recess area in which the external device connecting portion is disposed;
- and
- at least one second recess area in which the main processor chip is directly attached to a bottommost layer of the at least one second recess area, the at least one second recess area is defined by the first conductive layer and at least a portion of the first insulating layer such that a bottommost surface of the at least one second recess area is within or below the first insulating layer and the bottommost surface of the at least one second recess area is at or above the second conductive layer,
- a number of first recess areas being a same number as a number of second recess areas.
Dependencies are inferred from the claim text.