System and method for handling non-synchronous interrupts in a time synchronous network

A method, comprising

• configuring a plurality of secondary devices based on a series of packet time slots, wherein respective packet time slots in the series are mapped to respective secondary devices, wherein successive packet time slots in the series are separated in time from one another by inter-packet times, further wherein the inter-packet times do not overlap any packet time slot;
• further configuring at least one of the plurality of secondary devices based on a common asynchronous interrupt time slot that occurs during an inter-packet time, wherein the configuring based on the common asynchronous interrupt time slot causes the secondary device to transmit an interrupt signal during the common asynchronous interrupt time slot;
• during respective packet time slots, receiving status information from a secondary device mapped to the packet time slot;
• during the common asynchronous interrupt time slot, monitoring for an interrupt signal from the at least one of the plurality of secondary devices;
• and
• generating one or more control signals based on signals received during the packet time slots and the common asynchronous interrupt time slot.

A processor configured to, when executing instructions stored in a memory, cause a primary device to

• configure a plurality of secondary devices based on a series of packet time slots, wherein respective packet time slots in the series are mapped to respective secondary devices, wherein successive packet time slots in the series are separated in time from one another by inter-packet times, further wherein the inter-packet times do not overlap any packet time slot;
• further configure at least one of the plurality of secondary devices based on a common asynchronous interrupt time slot that occurs during an inter-packet time, wherein the configuring based on the common asynchronous interrupt time slot causes the secondary device to transmit an interrupt signal during the common asynchronous interrupt time slot;
• and
• generate one or more control signals based on signals received during the packet time slots and the common asynchronous interrupt time slot.