Differential amplifier with impedance terminations

A method for reducing harmonic distortion in a differential amplifier comprising steps of:

• coupling a first capacitor and a first inductor in series between a first collector of the differential amplifier and a virtual ground node;
• coupling a second capacitor and a second inductor in series between a second collector of the differential amplifier and the virtual ground node, wherein the first collector and the second collector are communicatively coupled to a radio frequency (RF) output terminal;
• sizing inductances of the first inductor and the second inductor to filter a third harmonic of an amplified version of an RF signal that arrives at an RF input terminal of the differential amplifier;
• and
• integrating the differential amplifier into an integrated circuit having an areal dimension between 800 micrometers (μm) by 800 μm and 1000 μm by 1000 μm.

A wireless communication device comprising:

• a baseband processor;
• transmit circuitry configured to receive encoded data from the baseband processor and to modulate a carrier signal with the encoded data, wherein the transmit circuitry comprises:
• a radio frequency (RF) input terminal configured to receive an RF signal;
• an RF output terminal configured to output an amplified version of the RF signal;
• a first transistor having a first emitter coupled to a fixed voltage node, a first base communicatively coupled to the RF input, and a first collector communicatively coupled to the RF output terminal;
• a second transistor having a second emitter coupled to the fixed voltage node, a second base communicatively coupled to the RF input, and a second collector communicatively coupled to the RF output terminal;
• a first capacitor and a first inductor coupled in series between the first collector and a virtual ground node;
• a second inductor and a second capacitor coupled in series between the second collector and the virtual ground node;
• and
• a third inductor coupled between the virtual ground node and the fixed voltage node;
• wherein the differential amplifier is integrated into an integrated circuit having an areal dimension between 800 micrometers (μm) by 800 μm and 1000 μm by 1000 μm.