X-type multilevel converter systems including interleaved topologies for mutual inductance cancellation

A multi-phase power inverter for an electric propulsion system, the multi-phase power inverter comprising:

• a plurality of X-type multilevel power converters arranged to transfer electric power between a high-voltage direct current (DC) power supply and an electric machine, wherein each of the plurality of X-type multilevel power converters is a solid-state integrated circuit (IC) including:
• a positive DC power bus;
• a negative DC power bus;
• a neutral bus;
• a first alternating current (AC) bus;
• a second AC bus;
• a third AC bus;
• a fourth AC bus;
• a first conductive layer;
• a second conductive layer;
• a third conductive layer;
• a fourth conductive layer;
• a plurality of semiconductor switches including a first semiconductor switch, a second semiconductor switch, a third semiconductor switch, a fourth semiconductor switch, a fifth semiconductor switch, a sixth semiconductor switch, a seventh semiconductor switch, and an eighth semiconductor switch;
• and
• at least two first clamping diodes, and at least two second clamping diodes;
• and
• wherein the first semiconductor switch, the second semiconductor switch, the third semiconductor switch, and the fourth semiconductor switch are connected in series between the positive DC power bus and the negative DC power bus;
• wherein the fifth semiconductor switch, the sixth semiconductor switch, the seventh semiconductor switch, and the eighth semiconductor switch are connected in series between the positive DC power bus and the negative DC power bus;
• wherein the first semiconductor switch is connected to the second semiconductor switch at a first node, wherein the second semiconductor switch is connected to the third semiconductor switch at a second node, and wherein the third semiconductor switch is connected to the fourth semiconductor switch at a third node;
• wherein the fifth semiconductor switch is connected to the sixth semiconductor switch at a fourth node, wherein the sixth semiconductor switch is connected to the seventh semiconductor switch at a fifth node, and wherein the seventh semiconductor switch is connected to the eighth semiconductor switch at a sixth node;
• wherein the first clamping diode is connected between the third node and the fourth node;
• wherein the second clamping diode is connected between the first node and the sixth node;
• wherein the second node is connected to the first AC bus;
• wherein the fifth node is connected to the second AC bus;
• wherein the plurality of semiconductor switches, the positive DC power bus, the negative DC power bus, the first AC bus, the at least two first clamping diodes, and the at least two second clamping diodes are arranged into a plurality of tiers including:
• a first tier composed of the first conductive layer arranged coplanar with the second conductive layer;
• a second tier composed of the first semiconductor switch arranged coplanar with the second that is arranged coplanar with at least two first clamping diodes that are arranged coplanar with the fifth semiconductor switch that is arranged coplanar with the sixth semiconductor switch;
• a third tier composed of the positive DC power bus arranged coplanar with the first AC bus that is arranged coplanar with the second AC bus;
• a fourth tier composed of the negative DC power bus arranged coplanar with the third AC bus that is arranged coplanar with the fourth AC bus;
• a fifth tier composed of the third semiconductor switch arranged coplanar with the fourth semiconductor switch that is arranged coplanar with the at least two second clamping diodes that are arranged coplanar with the seventh semiconductor switch that is arranged coplanar with the eighth semiconductor switch;
• a sixth tier composed of the third conductive layer arranged coplanar with the fourth conductive layer, wherein the first tier is arranged parallel to the second tier that is arranged parallel to the third tier that is arranged parallel to the fourth tier that is arranged parallel to the fifth that is arranged parallel to the sixth tier;
• and
• wherein conductive spacers are arranged between the fifth semiconductor switch and the positive DC power bus, the first semiconductor switch and the positive DC power bus, each of the at least two first clamping diodes and a second power module substrate, the sixth semiconductor switch and the second AC bus, and the second semiconductor switch and the first AC bus;
• and
• wherein conductive spacers are arranged between the eighth semiconductor switch and the negative DC power bus, the fourth semiconductor switch and the negative DC power bus, each of the at least two second clamping diodes and a first power module substrate, the seventh semiconductor switch and the third AC bus, and the third semiconductor switch and the fourth AC bus.

A multi-phase power inverter for an electric propulsion system, the multi-phase power inverter comprising:

• a plurality of X-type multilevel power converters arranged to transfer electric power between a high-voltage direct current (DC) power supply and an electric machine, wherein each of the plurality of X-type multilevel power converters is a solid-state integrated circuit (IC) including:
• a first positive DC power bus;
• a second positive DC power bus;
• a first negative DC power bus;
• a second negative DC power bus;
• a neutral bus;
• a first alternating current (AC) bus;
• a second AC bus;
• a third AC bus;
• a fourth AC bus;
• a first conductive layer;
• a second conductive layer;
• a third conductive layer;
• a fourth conductive layer;
• a plurality of semiconductor switches including a first semiconductor switch, a second semiconductor switch, a third semiconductor switch, a fourth semiconductor switch, a fifth semiconductor switch, a sixth semiconductor switch, a seventh semiconductor switch, and an eighth semiconductor switch;
• and
• at least two first clamping diodes, and at least two second clamping diodes;
• wherein the first semiconductor switch, the second semiconductor switch, the third semiconductor switch, and the fourth semiconductor switch are connected in series between the positive DC power bus and the negative DC power bus;
• wherein the fifth semiconductor switch, the sixth semiconductor switch, the seventh semiconductor switch, and the eighth semiconductor switch are connected in series between the positive DC power bus and the negative DC power bus;
• wherein the first semiconductor switch is connected to the second semiconductor switch at a first node, wherein the second semiconductor switch is connected to the third semiconductor switch at a second node, and wherein the third semiconductor switch is connected to the fourth semiconductor switch at a third node;
• wherein the fifth semiconductor switch is connected to the sixth semiconductor switch at a fourth node, wherein the sixth semiconductor switch is connected to the seventh semiconductor switch at a fifth node, and wherein the seventh semiconductor switch is connected to the eighth semiconductor switch at a sixth node;
• wherein the at least two first clamping diodes are connected between the third node and the fourth node;
• wherein the at least two second clamping diodes are connected between the first node and the sixth node;
• wherein the second node is connected to the first AC bus;
• wherein the fifth node is connected to the second AC bus;
• wherein the plurality of semiconductor switches, the positive DC power bus, the negative DC power bus, the first AC bus, the at least two first clamping diodes, and the at least two second clamping diodes are arranged into a plurality of tiers including:
• a first tier composed of the fifth semiconductor switch arranged coplanar with the sixth semiconductor switch that is arranged coplanar with the seventh semiconductor switch that is arranged coplanar with the eighth semiconductor switch;
• a second tier composed of the first positive DC power bus arranged coplanar the first negative DC power bus that is arranged coplanar with the first conductive layer that is arranged coplanar with second conductive layer that is coplanar with the first AC bus;
• a third tier composed of the first clamping diode arranged coplanar with the second clamping diode;
• a fourth tier composed of the second positive DC power bus arranged coplanar with the second negative DC power bus that is arranged coplanar with the third conductive layer that is arranged coplanar with the fourth conductive layer that is arranged coplanar with the second AC bus;
• and
• a fifth tier composed of the first semiconductor switch arranged coplanar with the second semiconductor switch that is arranged coplanar with the third semiconductor switch that is arranged coplanar with the fourth semiconductor switch.