Arrangement and method for discharging a DC link capacitor
AssigneeHanon Systems
InventorsAndreas Dick, Stefan Tydecks
Life of this patent
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Abstract
An arrangement and a method for discharging a DC link capacitor, is based on the object of specifying a solution with which the DC link capacitor is discharged to values below the safety extra-low voltage within a specified time in the event of a hazard or malfunction, for example, if the high-voltage supply is disconnected or interrupted, and with which the lowest possible power loss results from the arrangement during normal operation. This object is achieved by the arrangement in that the means which discharges the DC link capacitor is a controllable discharge means which is constructed from a series circuit of a discharge resistor and a controllable resistor, and wherein the controllable discharge means is arranged parallel to the DC link capacitor.
Claims6
An arrangement for discharging a DC link capacitor, in which a means which discharges the DC link capacitor is arranged parallel to the DC link capacitor, wherein the means which discharges the DC link capacitor is a controllable discharge means which is constructed from a series circuit of a discharge resistor and a controllable resistor, and wherein the controllable discharge means is arranged parallel to the DC link capacitor wherein the controllable discharge means is connected to a voltage-detecting control means which monitors a failure of a high-voltage present at the DC link capacitor, wherein the voltage-detecting control means has at least one Zener diode and a first resistor, wherein there are further arranged in the voltage-detecting control means:
- parallel to the DC link capacitor, a voltage divider having a second resistor, a fourth resistor, and a center tap;
- and
- a fourth transistor, the gate terminal of which is connected to the center tap of the voltage divider, the source terminal of which is connected via a seventh resistor to the potential HV− of the high-voltage source, and the drain terminal of which is connected to a control input of the controllable resistor and via a sixth resistor and the first resistor to the potential HV+ of the high-voltage source.
An arrangement for discharging a DC link capacitor, in which a means discharging the DC link capacitor is arranged parallel to the DC link capacitor, wherein the means discharging the DC link capacitor by means of a passive discharge is a controllable discharge means, which is constructed from a series circuit of a discharge resistor and a controllable resistor, wherein the controllable discharge means is arranged parallel to the DC link capacitor, wherein the controllable discharge means is connected to a voltage-detecting control means which monitors a failure of a high-voltage present at the DC link capacitor, wherein the voltage-detecting control means has at least one Zener diode and a first resistor, wherein there are further arranged in the voltage-detecting control means:
- parallel to the DC link capacitor, a voltage divider having a second resistor, a fourth resistor, and a center tap;
- and
- a controllable switch, which has a first transistor connected to the center tap, a second transistor connected to the first transistor, and a third transistor connected to a control input of the controllable resistor.
An arrangement for discharging a DC link capacitor, in which a means discharging the DC link capacitor is arranged parallel to the DC link capacitor, wherein the means discharging the DC link capacitor by means of a passive discharge is a controllable discharge means, which is constructed from a series circuit of a discharge resistor and a controllable resistor, wherein the controllable discharge means is arranged parallel to the DC link capacitor, wherein the controllable discharge means is connected to a voltage-detecting control means which monitors a failure of a high-voltage present at the DC link capacitor, wherein the voltage-detecting control means has at least one Zener diode and a first resistor, wherein there are further arranged in the voltage-detecting control means:
- parallel to the DC link capacitor, a voltage divider having a second resistor, a fourth resistor, and a center tap;
- and
- a fourth transistor, the gate terminal of which is connected to the center tap of the voltage divider and via a third capacitor to the potential HV− of the high-voltage source, the source terminal of which is connected via a seventh resistor and via a second capacitor to a potential HV− of the high-voltage source, and the drain terminal of which is connected to a control input of the controllable resistor and via a sixth resistor and the first resistor to the potential HV+ of the high-voltage source.
Dependencies are inferred from the claim text.