US 12,725,674 B2 · Die level failure recovery

Abstract

Programming techniques disclosed herein may be used to recover from potential plane and/or die level failures. The memory system may detect evidence of a plane or die level failure that impacts memory operations performed in a target region of the blocks if a first programming technique is used in the target region. For example, the memory system may note that a significant number of blocks have memory operation failures in the target region. The storage system switches to a second programming technique for programming the target region responsive to detecting evidence of a plane or die level failure. The blocks may be tested for a reliability criterion after programming using the second programming technique in the target region of the block. The second programming technique may overcome the plane or die level failure such that blocks may continue to be used with the second programming technique.

Claims19

Dependent claims

An apparatus comprising:

one or more control circuits configured to connect to a three-dimensional memory structure, the memory structure having blocks of memory cells in a plane on a die, the blocks associated with a source line, the one or more control circuits configured to:
program a target region within the blocks in the plane with a first programming technique that applies a first voltage having a first magnitude to a control line in the blocks;
determine that there is evidence of a plane or die level failure responsive to a threshold number of the blocks failing to meet a reliability criterion with respect to memory operation failures within the target region;
and
program the target region within at least a subset of the blocks in the plane with a second programming technique responsive to detecting the evidence of the plane or die level failure, the second programming technique applies a second voltage having a second magnitude to the control line in the blocks.

2 more elements

A method for operating NAND memory, the method comprising:

for each block of a plurality of blocks in a plane of the NAND memory, applying a first voltage having a first magnitude to a source line in the NAND memory while programming a set of word lines in each respective block in the plurality of blocks;
identifying a count of blocks in the plane having a block level failure following programming the set of word lines while applying the first voltage to the source line;
and
applying a second voltage having a second magnitude less than the first magnitude to the source line while programming the set of word lines in the blocks having the block level failure responsive to the count being greater than a limit.

1 more element

A non-volatile storage system, the system comprising:

a three-dimensional NAND memory structure having blocks, each block comprising NAND strings above a source line, each NAND string having a NAND channel;
a first voltage generator configured to output a first voltage having a first magnitude;
a second voltage generator configured to output a second voltage having a second magnitude smaller than the first magnitude;
and
one or more control circuits in communication with the three-dimensional NAND memory structure, the first voltage generator, and the second voltage generator, wherein the one or more control circuits are configured to:
pre-charge the NAND channels of unselected NAND strings in the blocks using the first voltage from the first voltage generator for a set of program voltages when programming a set of word lines in the blocks;
identify blocks that are candidates to retire following programming that includes using the first voltage from the first voltage generator for the set of program voltages when programming the set of word lines in the blocks;
identify a subset of the blocks that are candidates to retire that fail to meet a reliability criterion within the set of word lines;
and
pre-charge the NAND channels of unselected NAND strings in the subset that are candidates to retire using the second voltage from the second voltage generator for the set of program voltages when programming the set of word lines of the subset that are candidates to retire.

7 more elements

Dependencies are inferred from the claim text.

Die level failure recovery

Life of this patent

Die level failure recovery

Life of this patent

Abstract

Claims19