Back to results
US 12,725,557 B1Granted
Digital-to-analog converter with improved transient response
AssigneeNovatek Microelectronics Corp.
InventorChi-Ting Chen
Life of this patent
Estimating the term…
Abstract
A digital-to-analog converter (DAC) includes at least one multiplexer (MUX), wherein each of the MUX includes a plurality of basic switches and an assistant switch. The plurality of basic switches are coupled between an output terminal of the MUX and a plurality of input terminals of the MUX, and controlled by a plurality of grayscale codes. The assistant switch is coupled to the output terminal of the MUX, and controlled by a control signal different from each of the plurality of grayscale codes.
Claims9
A digital-to-analog converter (DAC), comprising:
- at least one multiplexer (MUX), each comprising:
- a plurality of basic switches, coupled between an output terminal of the MUX and a plurality of input terminals of the MUX, and controlled by a plurality of grayscale codes;
- and
- an assistant switch, coupled to the output terminal of the MUX, and controlled by a control signal different from each of the plurality of grayscale codes,
- wherein the control signal is generated by a control circuit, which comprises:
- a plurality of channels, each comprising:
- a delay cell to delay a first grayscale code among the plurality of grayscale codes to generate a delayed grayscale code;
- and
- an exclusive-OR gate, coupled to the delay cell, to perform a logic operation on the first grayscale code and the delayed grayscale code to generate a pulse signal;
- and
- an OR gate, coupled to the plurality of channels, to combine the pulse signal of the plurality of channels to generate the control signal.
8 more elements
A display system, comprising:
- a display panel;
- a plurality of source operational amplifiers, coupled to the display panel;
- a gamma circuit;
- a control circuit to generate a control signal which is different from each of a plurality of grayscale codes;
- and
- a digital-to-analog converter (DAC), comprising a plurality of multiplexers (MUXs), each of the plurality of MUXs having a plurality of input terminals coupled to the gamma circuit and an output terminal coupled to one of the plurality of source operational amplifiers, and comprising:
- a plurality of basic switches, coupled between the output terminal of the MUX and the plurality of input terminals of the MUX, and controlled by the plurality of grayscale codes;
- and
- an assistant switch, coupled to the output terminal of the MUX, and controlled by the control signal,
- wherein the control circuit comprises:
- a plurality of channels, each comprising:
- a delay cell to delay a first grayscale code among the plurality of grayscale codes to generate a delayed grayscale code;
- and
- an exclusive-OR gate, coupled to the delay cell, to perform a logic operation on the first grayscale code and the delayed grayscale code to generate a pulse signal;
- and
- an OR gate, coupled to the plurality of channels, to combine the pulse signal of the plurality of channels to generate the control signal.
13 more elements
Dependencies are inferred from the claim text.