Test handler for graphics chip

A test handler for graphics chips, the test handler comprising:

• a loading unit configured to perform a loading process of loading a graphics chip which is to be tested;
• a test unit configured to test the graphics chip which is to be tested;
• an unloading unit configured to perform an unloading process of unloading the tested graphics chip;
• and
• a buffer unit configured to transfer the graphics chip between the loading unit and the test unit and to transfer the graphics chip between the unloading unit and the test unit,
• wherein the test unit comprises a graphics card, a contact unit connecting the graphics card to the graphics chip which is to be tested, a test groove into which the graphics chip is accommodated, and a test body where the test groove is formed,
• wherein the graphics card comprises a chip mount unit connected to the graphics chip accommodated into the test groove, and
• wherein the test unit comprises a movement unit configured to move the contact unit between a contact position, at which the contact unit is disposed on the test groove, and a standby position spaced apart from the contact position.

A test handler for graphics chips, the test handler comprising:

• a loading unit configured to perform a loading process of loading a graphics chip which is to be tested;
• a test unit configured to test the graphics chip which is to be tested;
• an unloading unit configured to perform an unloading process of unloading the tested graphics chip;
• and
• a buffer unit configured to transfer the graphics chip between the loading unit and the test unit and to transfer the graphics chip between the unloading unit and the test unit,
• wherein the test unit comprises a graphics card, a contact unit connecting the graphics card to the graphics chip which is to be tested, a test groove into which the graphics chip is accommodated, a test body where the test groove is formed, and a test latch for supporting the graphics chip accommodated into the test groove, and
• wherein the graphics card comprises a chip mount unit connected to the graphics chip accommodated into the test groove, and
• wherein the contact unit connects the graphics chip, supported by the test latch, to the chip mount unit and is then spaced apart therefrom, and in a case where the contact unit is spaced apart from the graphics chip, the test latch supports the graphics chip so that the graphics chip is maintained with being accommodated into the test groove.