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AssigneeInternational Business Machines Corporation
InventorsTakeo Yasuda, Robert K. Montoye, Gerald W. Gibson, Sergey Rylov
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A superconducting multi-stage synchronous logic circuit structure includes a first clocked logic gate, a second clocked logic gate, and an unclocked logic gate. Each of the logic gates includes Josephson junctions. The first clocked logic gate has a single first clocked logic gate output; the second clocked logic gate has a single second clocked logic gate output. The unclocked logic gate has a first input connected in electrical communication with the first clocked logic gate output and has a second input connected in electrical communication with the second clocked logic gate output, and has a single output. The Josephson junctions of the unclocked logic gate are arranged such that, in a single clock cycle that drives the first clocked logic gate and the second clocked logic gate, the unclocked logic gate produces a single signal in response to the inputs of the first and second clocked logic gates.
A superconducting multi-stage synchronous logic circuit structure, comprising:
A method of operating a superconducting logic circuit structure, which includes first and second synchronous superconducting logic gates with their outputs tied to inputs of an asynchronous superconducting logic gate, the method comprising:
Dependencies are inferred from the claim text.