Circuitry and methods for implementing capability-directed prefetching
AssigneeIntel Corporation
InventorScott D. Constable
Life of this patent
Estimating the term…
Abstract
Systems, methods, and apparatuses for implementing capability-directed array prefetching are described. In certain examples, a hardware processor comprises an execution circuit to execute an instruction that generates a memory access request for an element in memory; a capability management circuit to check a capability for the memory access request, the capability comprising an address field of the element in the memory, a validity field, and a bounds field that is to indicate a lower bound and an upper bound of an object to which the capability authorizes access; a cache; and a prefetch circuit to prefetch an additional element of the object from the memory to the cache based on the capability checked by the capability management circuit.
Claims24
An apparatus comprising:
- an execution circuit to execute an instruction that generates a memory access request for an element in memory via a capability;
- a capability management circuit to check the capability for the memory access request, the capability comprising an address field of the element in the memory, a validity field, and a bounds field that is to indicate a lower bound and an upper bound of an object to which the capability authorizes access;
- a cache;
- and
- a prefetch circuit to prefetch an additional element of the object from the memory to the cache based on the capability checked by the capability management circuit.
A method comprising:
- executing, by an execution circuit of a processor, an instruction that generates a memory access request for an element in memory via a capability;
- checking, by a capability management circuit of the processor, the capability for the memory access request, the capability comprising an address field of the element in the memory, a validity field, and a bounds field that is to indicate a lower bound and an upper bound of an object to which the capability authorizes access;
- and
- prefetching, by a prefetch circuit of the processor, an additional element of the object from the memory to a cache of the processor based on the capability checked by the capability management circuit.
A system comprising:
- a memory;
- a processor comprising:
- an execution circuit to execute an instruction that generates a memory access request for an element in the memory via a capability, and
- a cache separate from the memory;
- a capability management circuit to check the capability for the memory access request, the capability comprising an address field of the element in the memory, a validity field, and a bounds field that is to indicate a lower bound and an upper bound of an object to which the capability authorizes access;
- and
- a prefetch circuit to prefetch an additional element of the object from the memory to the cache based on the capability checked by the capability management circuit.
Dependencies are inferred from the claim text.