Apparatus and method for managing memory cell endurance of analog computing system

Abstract

Disclosed herein are an apparatus and method for managing memory cell endurance of an analog computing system. The apparatus for managing memory cell endurance of an analog computing system includes memory configured to store at least one program and a processor configured to execute the program, wherein the program is configured to determine analog processing elements in which matrix data is to be arranged and write matrix data to the determined analog processing elements, and as an update for matrix data stored in the analog processing elements occurs, write updated matrix data to memory cells selected based on a number of write operations on internal memory cells of each of the analog processing elements.

Dependencies are inferred from the claim text.