Die power management

A method comprising:

• providing power to a first chiplet, the first chiplet comprising a first processor core or associated with a first input/output (IO) die in a processor, and a second chiplet, the second chiplet comprising a second processor core or associated with a second IO die in the processor;
• disconnecting the second chiplet from power while maintaining power to the first chiplet;
• and
• increasing a clock frequency of the first processor core after the disconnecting.

A non-transitory computer readable medium embodying a set of executable instructions, the set of executable instructions to manipulate at least one processor to:

• provide power to a first chiplet, the first chiplet comprising a first processor core or associated with a first input/output (IO) die in a processor, and a second chiplet, the second chiplet comprising a second processor core or associated with a second IO die in the processor;
• disconnect the second chiplet from power while maintaining power to the first chiplet;
• and
• increase a clock frequency of the first processor core after the disconnecting.