Power semiconductor device
AssigneeInfineon Technologies Austria AG
InventorsRalf Otremba, Christian Fachmann
Life of this patent
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Abstract
A power semiconductor device includes: a package and a plurality of power semiconductor chips, each power semiconductor chip including a semiconductor body, a first load terminal, a second load terminal and a control terminal. The device also includes a plurality of outside terminals. The outside terminals include: one or more first outside terminals electrically connected with the first load terminals; one or more second outside terminals each of which is electrically connected with each of the second load terminals; and a plurality of third outside terminals. Each control terminal is electrically connected with at least one individual third outside terminal of the plurality of third outside terminals.
Claims23
A power semiconductor device, comprising:
- a package including a housing that has a first side and a second side opposite to the first side;
- within the housing, a plurality of power semiconductor chips each comprising:
- a semiconductor body;
- a first load terminal and a second load terminal coupled to the semiconductor body;
- and
- a control terminal,
- wherein the semiconductor body is configured to conduct a load current between the first load terminal and the second load terminal based on a control signal received via the control terminal;
- and
- a plurality of outside terminals configured to provide for an electrical connection between the terminals of the power semiconductor chips within the housing and components of a power circuit external of the package,
- wherein the plurality of outside terminals comprises:
- one or more first outside terminals electrically connected with the first load terminals;
- one or more second outside terminals each of which is electrically connected with each of the second load terminals;
- a plurality of third outside terminals, wherein each control terminal is electrically connected with at least one individual third outside terminal of the plurality of third outside terminals,
- wherein some or all of the first load terminals are connected with each other within the package,
- wherein the power semiconductor device further comprises a clip electrically connecting each of the first load terminals within the housing with each other and forming the electrical connection between the first load terminals and the first outside terminals.
A power semiconductor device, comprising:
- a package including a housing that has a first side and a second side opposite to the first side;
- within the housing, a plurality of power semiconductor chips each comprising:
- a semiconductor body;
- a first load terminal and a second load terminal coupled to the semiconductor body;
- and
- a control terminal,
- wherein the semiconductor body is configured to conduct a load current between the first load terminal and the second load terminal based on a control signal received via the control terminal;
- and
- a plurality of outside terminals configured to provide for an electrical connection between the terminals of the power semiconductor chips within the housing and components of a power circuit external of the package,
- wherein the plurality of outside terminals comprises:
- one or more first outside terminals electrically connected with the first load terminals;
- one or more second outside terminals each of which is electrically connected with each of the second load terminals;
- a plurality of third outside terminals, wherein each control terminal is electrically connected with at least one individual third outside terminal of the plurality of third outside terminals,
- wherein some or all of the first load terminals are connected with each other within the package,
- wherein each first load terminal of a first subset of the plurality of the power semiconductor chips is electrically connected with at least one individual first outside terminal of the plurality of first outside terminals,
- wherein each first load terminal of a second subset of the plurality of the power semiconductor chips is electrically connected with at least one other individual first outside terminal of the plurality of first outside terminals,
- wherein the power semiconductor device further comprises:
- a first clip forming the electrical connection between the first load terminals of the first subset of the plurality of the power semiconductor chips and the least one individual first outside terminal;
- and
- a second clip forming the electrical connection between the first load terminals of the second subset of the plurality of the power semiconductor chips and the least one other individual first outside terminal.
A power semiconductor device, comprising:
- a package including a housing that has a first side and a second side opposite to the first side;
- within the housing, a plurality of power semiconductor chips each comprising:
- a semiconductor body;
- a first load terminal and a second load terminal coupled to the semiconductor body;
- and
- a control terminal,
- wherein the semiconductor body is configured to conduct a load current between the first load terminal and the second load terminal based on a control signal received via the control terminal;
- a sense chip configured to sense a voltage between the first load terminals and the second load terminals;
- and
- a plurality of outside terminals configured to provide for an electrical connection between the terminals of the power semiconductor chips within the housing and components of a power circuit external of the package,
- wherein the plurality of outside terminals comprises:
- one or more first outside terminals electrically connected with the first load terminals;
- one or more second outside terminals each of which is electrically connected with each of the second load terminals;
- a plurality of third outside terminals, wherein each control terminal is electrically connected with at least one individual third outside terminal of the plurality of third outside terminals,
- wherein some or all of the first load terminals are connected with each other within the package.
Dependencies are inferred from the claim text.