Semiconductor package having memory devices stacked in staircase
AssigneeSK hynix Inc.
InventorByung Deuk Jeon
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AssigneeSK hynix Inc.
InventorByung Deuk Jeon
Estimating the term…
A semiconductor package includes a substrate having bond fingers; a master memory chip mounted on the substrate; and a slave memory chip stacked over the master memory chip. The master memory chip includes master external pads and master internal pads disposed adjacent to a first side edge of the master memory chip; and master power pads disposed adjacent to a second side edge of the master memory chip. The slave memory chip includes slave external pads and slave internal pads disposed adjacent to a first side edge of the slave memory chip; and slave power pads disposed adjacent to a second side edge of the slave memory chip. A portion of the bond fingers is electrically connected to the master external pads through external bonding wires. The master internal pads are electrically connected to the slave internal pads through internal bonding wires, respectively, and the slave external pads are floated.
A semiconductor package, comprising:
A semiconductor package, comprising:
A semiconductor package comprising:
Dependencies are inferred from the claim text.