Memory and semiconductor package with peripheral capacitors
AssigneeSK hynix Inc.
InventorDong Sop Lee
Life of this patent
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Abstract
In an embodiment of the present disclosure, since peripheral capacitors are disposed in an area other than an area where a plurality of memory cells of a memory are disposed, by using a method of forming cell capacitors disposed in the plurality of memory cells, the peripheral capacitors may be provided while improving the spatial efficiency of the memory. The peripheral capacitors of the memory may be provided as passive elements of a circuit positioned outside the memory, and thus, various semiconductor packages each including a memory may be easily implemented.
Claims17
A semiconductor package comprising:
- a memory including a first area in which a plurality of memory cells are disposed and a second area which is positioned outside the first area, wherein the memory includes cell capacitors disposed in the first area, and at least two peripheral capacitors disposed in the second area, each of the at least two peripheral capacitors includes a second upper electrode and a second lower electrode;
- a power control circuit positioned outside the memory, and configured to supply a voltage to the at least two peripheral capacitors;
- a first pad electrode electrically connected to the second upper electrode included in at least one of the at least two peripheral capacitors, and exposed to an outside;
- and
- a second pad electrode electrically connected to the second lower electrode included in at least one of the at least two peripheral capacitors, and exposed to the outside.
A memory comprising:
- a plurality of first capacitors included in a plurality of memory cells, and disposed in a first area;
- a plurality of second capacitors positioned in a second area positioned outside the first area, and electrically connected to each other, each of the plurality of second capacitors includes a second upper electrode and a second lower electrode;
- a first pad electrode electrically connected to the second upper electrode, and exposed to an outside;
- and
- a second pad electrode electrically connected to the second lower electrode, and exposed to the outside.
A semiconductor package comprising:
- a printed circuit board (PCB);
- a memory mounted on the PCB;
- and
- a solution device mounted on the PCB,
- wherein the memory includes cell capacitors disposed in a core area and peripheral capacitors disposed in a peripheral circuit area, and
- wherein the peripheral capacitors are configured to be used for the solution device,
- wherein the peripheral capacitors and the cell capacitors are implemented as silicon capacitors formed through a single process.
Dependencies are inferred from the claim text.