Bump-on-trace design for enlarge bump-to-trace distance

A package comprising:

• a first metal trace, the first metal trace comprising:
• a first narrower portion;
• and
• two first wider portions physically joined to the first narrower portion and on opposite sides of the first narrower portion;
• and
• a second metal trace immediately neighboring the first metal trace;
• and
• a solder region on the second metal trace, wherein in a top view of the solder region, a straight line extending from a center of the solder region and perpendicular to a lengthwise direction of the second metal trace passes through the first narrower portion of the first metal trace.

A package comprising:

• a dielectric layer;
• a first metal trace over the dielectric layer;
• a second metal trace over the dielectric layer, wherein each of the first metal trace and the second metal trace comprises a narrower portion and a wider portion wider than the narrower portion;
• a first solder region in physical contact with the first metal trace;
• and
• a second solder region in physical contact with the second metal trace, wherein the first solder region and the second solder region physically contact top surfaces and opposite sidewalls of the wider portions of the first metal trace and the second metal trace, respectively.